Stacked Image Sensor Wiring Layout for Void-Free Wafer Bonding
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Solution Overview
Problem
In solid-state imaging devices, a high coverage ratio of copper electrodes can lead to void formation during wafer bonding, resulting in weak bonding strength and potential separation during substrate thinning, while a low coverage ratio limits the efficient utilization of conductive films as wiring layers due to increased wiring resistance.
Innovation Solution
The implementation of a conductive film with a low coverage ratio as a bonding surface wiring, featuring a trench-like shape with an aspect ratio greater than 1, functions as both a current path and a bonding layer, reducing wiring resistance and preventing void formation by increasing the insulation film ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a high coverage ratio of copper electrodes is used, then wiring resistance is reduced, but void formation occurs during wafer bonding resulting in weak bonding strength
Solution Approach 1:
The patent applies local quality by creating a trench-like shape in the conductive film with different aspect ratios in different regions. The connection hole portion has a first aspect ratio while the bonding surface wiring portion has a second aspect ratio greater than the first. This local variation in geometry allows the bonding surface to have reduced copper coverage (preventing voids) while maintaining adequate conductivity through the connection holes.
2Reliability
If a low coverage ratio of copper electrodes is used, then void formation is prevented during wafer bonding, but wiring resistance increases
Solution Approach 1:
The patent transitions from a two-dimensional coverage ratio problem to a three-dimensional aspect ratio solution. By controlling the depth-to-width ratio (aspect ratio) of the trench-like conductive film, the invention achieves both low surface coverage (preventing voids) and adequate conductivity (through the vertical dimension of the connection holes). This dimensional transformation resolves the contradiction between coverage ratio and wiring resistance.
Data Source
AI summary
An imaging device includes a first substrate including a pixel array and a first multilayer wiring layer. The first multilayer wiring layer includes a first wiring that receives electrical signals based on electric charge generated by at least one photoelectric conversion unit, and a plurality of second wirings. The imaging device includes a second substrate including a second multilayer wiring layer and a logic circuit that processes the electrical signals. The second multilayer wiring layer includes a third wiring bonded to the first wiring, and a plurality of fourth wirings. At least one of the plurality of fourth wirings being bonded to at least one of the plurality of second wirings. The second multilayer wiring layer includes at least one fifth wiring that is connected to the plurality of fourth wirings and that receives a power supply signal.