3D Stacked Imaging Circuit Layout With Low-Permittivity Isolation

Solution Overview

Problem

Three-dimensionally structured imaging devices are prone to influences from resistive, capacitive, and inductive components due to their complex internal circuit structures, leading to performance degradation.

Innovation Solution

The implementation of a low-permittivity region around specific circuits in a three-dimensionally structured imaging device, such as between wiring lines and semiconductor substrates, to reduce parasitic capacitance and improve signal processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a three-dimensionally structured imaging device is implemented to achieve further size reduction and higher pixel density, then miniaturization and pixel density are improved, but the device becomes more susceptible to resistive, capacitive, and inductive components that degrade performance

Engineering Contradiction:

Improvedevice sizeVSAvoidperformance stability

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by providing a low-permittivity region specifically around the circuit that reads electric charges from sensor pixels and outputs pixel signals. This localized modification targets the specific area where parasitic capacitance has the most significant impact, rather than uniformly modifying the entire device structure. The low-permittivity material is strategically placed to reduce parasitic capacitance in the charge reading circuit while maintaining the three-dimensional stacked architecture.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the permittivity parameter of the material in the region surrounding the charge reading circuit. By introducing a low-permittivity material (with permittivity lower than the surrounding insulating material), the patent directly modifies the electrical parameter that causes parasitic capacitance. This parameter change reduces the capacitive coupling between adjacent wiring lines and between wiring lines and substrate, thereby improving signal integrity while maintaining the compact three-dimensional structure.

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If the internal circuit structure is made complex to achieve higher pixel density, then pixel density is improved, but the influence of resistive, capacitive, and inductive components increases

Engineering Contradiction:

Improvepixel densityVSAvoidparasitic capacitance

Core Design Contradiction:

Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by providing a low-permittivity region specifically around the circuit that reads electric charges from sensor pixels and outputs pixel signals. This localized modification targets the specific area where parasitic capacitance has the most significant impact, rather than uniformly modifying the entire device structure. The low-permittivity material is strategically placed to reduce parasitic capacitance in the charge reading circuit while maintaining the three-dimensional stacked architecture.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent converts the harmful effect of close wiring spacing (which generates parasitic capacitance) into a benefit by introducing low-permittivity material in the spaces between wiring lines. The same tight integration that causes high pixel density also creates the parasitic capacitance problem, but by filling the inter-wiring spaces with low-permittivity material, the patent transforms this closely-spaced structure from harmful to beneficial, reducing parasitic capacitance while maintaining high density.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively minimizes the impact of parasitic capacitance, enhancing the conversion efficiency of electric charges into voltage and improving overall imaging device performance.

Implementation Method 1

a low-permittivity region is provided in at least any region around a circuit that reads electric charges from the sensor pixel and outputs the pixel signal... reduce permittivity of a wiring line included in a second insulating layer or of a space around a second semiconductor substrate

Methodology Applied

Scientific EffectParasitic capacitance: Capacitance

Data Source

PatentUS20240381008A1Imaging device

Publication Date: 2024.11.14 SONY SEMICON SOLUTIONS CORP

AI summary

An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a low-permittivity region is provided in at least any region around a circuit that reads electric charges from the sensor pixel and outputs the pixel signal.