Solid-State Imaging Device Vertical Signal Line Positioning
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Solution Overview
Problem
The existing layered solid-state imaging devices suffer from signal mixing between unit pixel cells due to electrical capacitive coupling, leading to reduced spatial resolution and color mixture, which is not adequately addressed by current designs.
Innovation Solution
The implementation of a solid-state imaging device with a two-dimensional array of unit pixel cells, where the vertical signal line is positioned below the pixel electrodes, and local wiring is strategically placed in lowermost regions of the multi-layered wiring layer to minimize capacitive coupling, along with the use of a shielding electrode to further reduce electrical interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the vertical signal line is disposed below the pixel electrode of a unit pixel cell, then the device structure is simplified and manufacturing is easier, but signal mixing between unit pixel cells occurs due to electrical capacitive coupling
Solution Approach 1:
The patent extracts the problematic vertical signal line from its conventional position below the pixel electrode and relocates it to a position outside the pixel electrode's projection area. This separation removes the source of capacitive coupling while maintaining the simplified manufacturing approach, thus resolving the contradiction between ease of manufacture and spatial resolution.
Solution Approach 2:
The patent introduces a shielding electrode as an intermediary element positioned between the pixel electrode and the vertical signal line. This shielding electrode acts as a mediator that blocks electrical capacitive coupling between adjacent unit pixel cells, allowing the vertical signal line to remain in a manufacturable position while preventing signal mixing.
2Device complexity
If the vertical signal line is disposed below the pixel electrode, then device complexity is reduced, but color mixture occurs due to capacitive coupling between unit pixel cells
Solution Approach 1:
The patent extracts the vertical signal line from the region below the pixel electrode and repositions it laterally outside the pixel electrode's projection. This extraction eliminates the capacitive coupling pathway that causes color mixture while keeping the overall device structure relatively simple.
Solution Approach 2:
Instead of positioning the vertical signal line in the vertical dimension below the pixel electrode, the patent relocates it in the horizontal dimension outside the pixel electrode's projection area. This dimensional change in positioning resolves the color mixture issue without significantly increasing device complexity.
3Quantity of substance
If additional capacitance is increased to achieve higher saturation charge amount, then photoelectric conversion efficiency is improved, but capacitive coupling between unit pixel cells is enhanced
Solution Approach 1:
The patent converts the potentially harmful effect of high capacitance (which could enhance coupling) into a benefit by strategically positioning the vertical signal line outside the pixel electrode's projection area. This allows the photoelectric conversion unit to maintain high capacitance for increased saturation charge amount while the spatial separation prevents the harmful capacitive coupling from occurring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces capacitive coupling between pixel electrodes and signal lines, enhancing spatial resolution and color reproducibility, thereby achieving a high-resolution, compact solid-state imaging device with improved color reproducibility.
Implementation Method 1
a photoelectric conversion film which is formed above a semiconductor substrate and photoelectrically converts an incident light
Data Source
AI summary
A solid-state imaging device including unit pixel cells, each having a photoelectric conversion film and a pixel electrode which are formed above a silicon substrate, an amplification transistor which is formed on the silicon substrate and outputs a voltage according to a potential of the pixel electrode, and a reset transistor which is formed on the silicon substrate and resets a potential of a gate electrode of the amplification transistor, the imaging device including a vertical signal line which is disposed correspondingly to a column of the unit pixel cells, and transmits a voltage of the unit pixel cells of the corresponding column, and a vertical scanning unit which selects a row of the unit pixel cells having a voltage to be outputted to the vertical signal line, wherein the vertical signal line is located below the pixel electrode of the unit pixel cells corresponding to the vertical signal line.


