Imaging Device Pixel Signal Reading via Dynamic Transistor Selection
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Solution Overview
Problem
Conventional imaging devices are unable to read signals from optional pixels for each pixel during special reading modes like binning, cutout, and thinning, as the pixel used for these readings is fixed, limiting flexibility and efficiency.
Innovation Solution
The imaging device incorporates a configuration with multiple pixel units, each including a first and second pixel unit, connected via a connection unit that selectively connects between the amplification and selection transistors, allowing for flexible signal reading by sharing transistors and using a single vertical signal line, enabling binning, cutout, and thinning reading modes without increasing the number of vertical signal lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed pixel configuration is used for binning reading, then reading speed increases and data rate reduces, but the ability to read signals from optional pixels is lost
Solution Approach 1:
The patent applies dynamics by making the pixel configuration changeable through a selection transistor that can dynamically connect different pixel units (first pixel unit or second pixel unit) to the vertical signal line. This allows the system to switch between fixed binning configuration and flexible optional pixel selection, resolving the contradiction between reading speed improvement and pixel selection flexibility.
Solution Approach 2:
The patent implements universality by designing a multi-functional pixel unit that can serve multiple purposes: it can operate in fixed binning mode for high-speed reading, or switch to optional pixel selection mode for flexible imaging. The selection transistor enables the same hardware configuration to perform different functions based on operational requirements.
2Adaptability or versatility
If multiple vertical signal lines are added to support optional pixel reading, then pixel selection flexibility improves, but device complexity and wiring resources increase
Solution Approach 1:
The patent applies merging by combining multiple pixel units (first pixel unit and second pixel unit) to share a common vertical signal line. The selection transistor enables these merged pixel units to be selectively connected to the shared signal line, achieving pixel selection flexibility without requiring separate vertical signal lines for each pixel unit, thus avoiding increased device complexity.
Solution Approach 2:
The vertical signal line is designed to be multi-functional, serving as a shared output path for both the first pixel unit and the second pixel unit. This universal signal line can carry signals from either pixel unit depending on the selection transistor state, eliminating the need for dedicated signal lines and reducing overall wiring complexity.
3Device complexity
If pixel units share amplification and selection transistors, then device complexity reduces and wiring resources are minimized, but the ability to independently read signals from each pixel unit is limited
Solution Approach 1:
The patent applies dynamics by using a selection transistor that can dynamically route signals from either the first pixel unit or the second pixel unit through the shared amplification transistor to the vertical signal line. This dynamic switching capability maintains independent signal reading capability while sharing hardware resources, resolving the contradiction between reduced device complexity and preserved signal reading capability.
Solution Approach 2:
The selection transistor acts as an intermediary between the multiple pixel units and the shared amplification transistor. It controls which pixel unit's signal is passed to the amplification transistor, enabling independent signal reading capability while maintaining the shared hardware configuration that reduces device complexity.
Data Source
AI summary
An imaging device according to the present disclosure includes a plurality of pixel units each including a first pixel unit and a second pixel unit and a vertical signal line, in which each of the first pixel unit and the second pixel unit includes an amplification transistor, a selection transistor connected between the amplification transistor and the vertical signal line, and a connection unit that selectively connects between a common connection node of the amplification transistor and the selection transistor of the first pixel unit and a common connection node of the amplification transistor and the selection transistor of the second pixel unit.