Imaging Device Plug and Gate Height Equalization
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Solution Overview
Problem
In imaging devices, unnecessary resistance can occur due to poor contact between wirings and gate electrodes of transistors on the semiconductor substrate, leading to decreased signal charge accumulation and degraded image quality.
Innovation Solution
The imaging device features a semiconductor substrate with pixels that include a photoelectric converter, a diffusion region, a transistor with a gate, and a plug directly connected to the diffusion region, where the height of the plug and gate are equal, ensuring good contact and reliable wiring connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wiring structures are used, then device complexity is reduced, but contact reliability between wirings and gate electrodes deteriorates, generating unnecessary resistance
Solution Approach 1:
The patent merges the plug structure with the gate electrode structure by making them the same height and forming them in the same process step. This integration ensures automatic good contact between the wiring and gate electrode without requiring additional alignment steps, thereby improving contact reliability while maintaining manufacturing simplicity
Solution Approach 2:
The patent makes the plug and gate electrode have the same height, creating an equipotential surface that ensures uniform electrical contact. This eliminates contact resistance variations that would occur with height differences, improving overall contact reliability
2Reliability
If wiring contact with plugs and gate electrodes is poor, then manufacturing process is simpler, but signal charge accumulation decreases due to unnecessary resistance
Solution Approach 1:
By combining the plug and gate electrode formation into a single process step with the same height, the patent ensures precise wiring contact without requiring separate alignment operations. This merged approach maintains manufacturing precision while ensuring reliable signal charge accumulation
Solution Approach 2:
The patent performs the plug and gate electrode formation simultaneously before subsequent wiring steps, ensuring that the contact interfaces are already optimized and aligned. This preliminary action prevents contact issues that would arise from later alignment attempts
3Manufacturing precision
If plug and gate heights are different, then manufacturing process is simpler, but patterning accuracy of wiring structure and insulating layer deteriorates
Solution Approach 1:
The patent makes the plug and gate electrode have the same height, creating a uniform surface that simplifies subsequent patterning operations. This equipotential approach improves patterning accuracy by eliminating height-related alignment errors, while the uniformity is achieved through the same formation process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the accuracy of the wiring structure and insulating layer patterning, resulting in improved contact reliability between plugs and gates, thereby reducing unnecessary resistance and enhancing image quality.
Implementation Method 1
a photoelectric converter that converts incident light into electric charge
Data Source
AI summary
An imaging device according to one aspect of the present disclosure includes: a semiconductor substrate; and pixels. Each of the pixels includes: a photoelectric converter that converts incident light into electric charge; a diffusion region provided in the semiconductor substrate and electrically connected to the photoelectric converter; a first transistor including a gate, and the diffusion region as one of a source and a drain; and a plug that is directly connected to the diffusion region, is electrically connected to the photoelectric converter, and includes a semiconductor. The height of the plug and the height of the gate from the surface of the semiconductor substrate are equal to each other.