Impedance Matched Interconnect Structures for IC Signal Integrity
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Solution Overview
Problem
In electronic assemblies with multiple semiconductor chips, achieving impedance matching between chips is challenging, particularly in high-frequency applications, leading to signal reflections due to impedance discontinuities in conventional via connections.
Innovation Solution
An electronic assembly with an interconnect carrier featuring electrically insulating and conducting layers, where the conductor paths are designed to match the impedance between integrated circuit chips, either by matching the exact impedance or creating controlled impedance discontinuities to minimize reflections, and including additional interconnection structures like metallized vias and coaxial configurations for optimal signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional via connections are used to interconnect chips, then structural miniaturization is achieved, but impedance discontinuities cause signal reflections in high-frequency applications
Solution Approach 1:
The patent applies local quality by creating a coaxial interconnection structure with specific geometric proportions (inner conductor diameter, outer conductor inner diameter, and insulation layer thickness) that are locally optimized to achieve impedance matching. This localized structural design ensures that the interconnection path between chips maintains consistent impedance characteristics, preventing signal reflections while enabling miniaturization.
2Quantity of substance
If small interconnections are used to reduce structural size, then integration density increases, but impedance matching becomes difficult to achieve
Solution Approach 1:
The patent employs parameter changes by systematically adjusting the geometric parameters of the coaxial interconnection structure, including the inner conductor diameter, outer conductor inner diameter, and insulation layer thickness. These parameter optimizations enable impedance matching to be achieved within compact dimensions, thereby increasing integration density while maintaining manufacturing precision for high-frequency signal transmission.
3Reliability
If fully or partially metallized vias are used for electric contact, then connection between chips is established, but impedance jumps occur causing signal reflections
Solution Approach 1:
The patent introduces an intermediary insulation layer between the inner and outer conductors of the coaxial interconnection structure. This insulation layer acts as a mediator that maintains consistent impedance characteristics along the signal path, preventing impedance jumps and signal reflections while ensuring reliable electric connection between chips.
Data Source
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AI summary
Provided is an electronic assembly (120) comprising (a) an interconnect carrier (130) comprising an electrically insulating core (132) and at least two electrically conducting layers (134) formed at the electrically insulating core (132); (b) a first integrated circuit chip (122) mounted at a first side (130a) of the interconnect carrier (130); (c) a second integrated circuit chip (124) mounted at a second side (130b) of the interconnect carrier (130), wherein the second side (130b) is opposite to the first side (130a); and (d) an interconnection structure (140) electrically connecting the first integrated circuit chip (122) with the second integrated circuit chip (124). The electric interconnection structure (140) extends around the insulating core (132) and comprises at least one electric conductor path (150) which is designed in such a manner that an impedance match between the first integrated circuit chip (122) and the second integrated circuit chip (124) is provided. Further, there is provided an electronic system (300, 400, 600) comprising such an electronic assembly (120).