In-Memory Computing Cells Using PWM Control Instead of DACs
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Solution Overview
Problem
Existing in-memory computing devices suffer from computing errors and large circuit size due to sensitivity to Process Voltage Temperature (PVT) variations, and require complex digital-to-analog converters for precise control voltages.
Innovation Solution
Implementing memory cells controlled by pulse-width modulated binary control voltages based on digital words, eliminating the need for digital-to-analog converters and reducing sensitivity to PVT variations, thereby simplifying the circuit and reducing its size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital-to-analog converters are used to generate precise control voltages for memory cells, then computing precision is improved, but device complexity and size increase
Solution Approach 1:
The patent extracts and eliminates the digital-to-analog converter component from the system. Instead of using DACs to generate precise control voltages, the invention directly uses digital words to control memory cells, thereby removing the source of complexity and size increase while maintaining computing precision through alternative means (pulse-width modulation or direct digital control).
Solution Approach 2:
The patent substitutes the analog control mechanism (DAC-generated voltages) with a digital control mechanism. Memory cells are controlled directly by digital words or pulse-width modulated signals derived from digital words, replacing the need for analog voltage generation and eliminating the associated complexity of DAC circuits.
2Reliability
If complex control circuits are used to reduce PVT variations, then reliability is improved, but device size increases
Solution Approach 1:
The patent enables memory cells to be directly controlled by digital words without requiring external complex control circuits. The memory cells themselves perform the computation function by responding to digital control signals, eliminating the need for additional PVT compensation circuits and reducing overall device size while maintaining reliability.
Solution Approach 2:
The patent changes the control parameter from analog voltage levels (which require complex PVT compensation) to digital words or pulse-width modulated signals. This parameter change simplifies the control circuitry needed to compensate for PVT variations, as digital control is inherently more robust to such variations.
3Manufacturing precision
If precise analog control voltages are applied to memory cells, then computing accuracy is improved, but manufacturing complexity increases
Solution Approach 1:
The patent replaces the analog voltage control mechanism with direct digital control. Memory cells are controlled by digital words that can be easily generated and distributed, simplifying the manufacturing process. The digital control approach eliminates the need for precise analog voltage generation and distribution circuits, making the device easier to manufacture while maintaining computing accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces computing errors and circuit size by using pulse-width modulated control voltages, making the device more robust against PVT variations and simplifying the implementation of in-memory computing operations.
Implementation Method 1
an output configured to supply an output current having a value at least partly determined by a level of the control voltage of the memory cell and by a weight programmed in said memory cell
Implementation Method 2
a control input configured to receive a pulse-width modulated control voltage and an output configured to supply an output current having a value at least partly determined by a level of the control voltage
Implementation Method 3
a connection node configured to receive, during a first time period, the output currents of a plurality of memory cells among said memory cells
Implementation Method 4
a first circuit having an input connected to the connection node, the first circuit being configured to deliver an output signal having a value determined by a total quantity of current received by the input of the first circuit during the first time period
Data Source
AI summary
A device includes memory cells wherein each memory cell has a control input that receives a pulse-width modulated control voltage and an output that delivers a current depending on the control voltage and on a weight programmed in the memory cell. A node receives, during a first time period, the currents of the memory cells. A first circuit delivers an output determined by a total quantity of current received by the node during the first time period. For each memory cell, a second circuit receives a digital word and delivers, during the first time period, the pulse-width modulated control voltage at a first level only during a second time period determined by the digital word.