In-Place Data Inversion Using Sensing Circuitry
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Solution Overview
Problem
Existing memory systems require significant power and time to perform logical operations, especially when data needs to be transferred between processing resources and memory arrays, and they often struggle with efficient in-place computation due to the need for activating access lines and amplifying data lines.
Innovation Solution
The implementation of sensing circuitry within a memory array that allows for in-place inversion of data values without activating row lines or amplifying data lines, enabling faster and more energy-efficient logical operations by performing computations directly within the memory array, reducing the need for data transfer and utilizing parallel processing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred between processing resources and memory arrays using traditional bus interfaces, then data can be accessed and processed, but processing time increases and power consumption rises
Solution Approach 1:
The patent combines processing resources directly with the memory array by implementing functional units (ALU, FPU, logic blocks) within the memory structure itself. This merging eliminates the need for separate data transfer between external processors and memory, allowing computations to be performed in-place on stored data, thereby drastically reducing processing time and increasing throughput.
Solution Approach 2:
The patent introduces sensing circuitry as an intermediary component that enables logical operations directly within the memory array. The sensing circuitry includes compute components that can perform inversion and other logical operations on data values stored in memory cells without requiring data to be transferred out of the array, thus acting as a mediator between storage and processing functions.
2Loss of energy
If processing resources are implemented external to the memory array, then system architecture is simplified, but power consumption increases due to data transfer operations
Solution Approach 1:
The patent merges processing functionality directly into the memory array structure by integrating functional units and sensing circuitry with memory cells. This combination allows data to be processed in-place without transfer, significantly reducing power consumption associated with data movement while the integrated architecture manages the complexity through unified design.
Solution Approach 2:
The memory array becomes self-sufficient by incorporating computing capabilities within its structure. The sensing circuitry with compute components enables the memory to perform logical operations on its own stored data without external processing resources, allowing the system to serve its own processing needs and reduce overall power consumption.
3Ease of operation
If row lines are activated and data lines are amplified to perform logical operations, then data can be processed, but power consumption and operation time increase
Solution Approach 1:
The patent extracts the essential computational functionality from traditional complex memory access operations. By implementing inversion and other logical operations directly within the sensing circuitry without requiring full row line activation or data line amplification, the system takes out only the necessary processing capability needed, reducing power consumption while maintaining operational ease.
Solution Approach 2:
The patent applies partial action by performing logical operations using only the minimal necessary circuit activation. Instead of fully activating row lines and amplifying data lines for every operation, the sensing circuitry performs computations using partial signal activation, reducing power consumption while still achieving the desired logical operation results.
Data Source
AI summary
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a compute component. The sensing circuitry is configured to invert a data value in the compute component.