In-band Register Update Modes for Memory Training

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Solution Overview

Problem

Current memory interface training methods, particularly in computer memory systems, face delays due to the use of sideband buses, which operate at significantly lower speeds than command/address and data buses, limiting the scope of configuration updates and requiring separate training modes for different settings.

Innovation Solution

Implementing in-band register write modes, such as Register Word Update (RWUPD) and Mode Register Update (MRUPD), allows for configuration of any register word or mode register using in-band communication before chip select training, reducing reliance on sideband buses and accelerating training processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If sideband bus is used for configuration updates, then configuration can be performed before CA and DQ bus training, but training time is significantly increased due to low bus speed

Engineering Contradiction:
Improveconfiguration capabilityVSAvoidtraining time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent introduces an intermediary mechanism (in-band training sequence embedded in CA bus training) that allows configuration updates to occur concurrently with bus training through the same communication channel, rather than using a separate sideband bus. This mediator enables both configuration and training to proceed simultaneously, resolving the time loss without sacrificing configuration capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent merges the configuration update function with the CA bus training process by embedding configuration commands within the training sequence. This combination allows the system to perform both configuration and training operations through a single high-speed bus, eliminating the need for separate sideband bus operations and significantly reducing total training time.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If RWUPD mode is used for configuration updates, then DFE configuration can be updated in-band, but the scope is limited and cannot cover other configuration settings

Engineering Contradiction:
Improveconfiguration speedVSAvoidconfiguration scope
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent extends the in-band update mechanism from being limited to DFE configuration only to a universal solution that can update any mode register or configuration register. The enhanced MRUPD mode allows the same in-band training sequence to carry diverse configuration commands for multiple different settings, making the system both fast and versatile without requiring separate mechanisms for different configuration types.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If traditional MRW command is used for mode register updates, then configuration can be performed, but CA bus must be trained first which increases training time

Engineering Contradiction:
Improvecommand execution reliabilityVSAvoidtraining time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by embedding configuration update commands within the CA bus training sequence itself, allowing configuration to occur before the bus is fully trained for normal operations. The in-band training sequence carries configuration commands that are executed during the training process, eliminating the need to wait until after training completes before performing configuration updates.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230385208A1Accelerated memory training through in-band configuration register update mode
Publication Date: 2023.11.30 INTEL CORP
  • US20230385208A1 patent drawing
  • US20230385208A1 patent drawing
  • US20230385208A1 patent drawing

AI summary

A configuration register update mode can be implemented as a register word update (RWUPD) mode for a registering clock driver (RCD) or as a mode register update (MRUPD) mode for a dynamic random access memory (DRAM) device. In the update mode, In the update mode, the memory device (either the RCD or the DRAM) can perform configuration of any number of configuration registers with in-band register writes. The in-band register writes can be used to configure decision feedback equalization (DFE) settings, as well as other configuration settings for non-DFE configurations of a memory device interface.