Inclined Fluid Channel Heat Dissipation Substrate for Semiconductor Packaging
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Solution Overview
Problem
Miniaturization of semiconductor devices faces challenges with heat dissipation, particularly for computing dies like CPUs, where excessive temperatures can decrease reliability and lifetime, necessitating improved heat transfer solutions.
Innovation Solution
A package structure incorporating a heat dissipation substrate with an inclined fluid channel and multiple heat dissipation substrates arranged to enhance coolant flow and thermal conductivity, ensuring uniform temperature distribution across integrated circuit dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the die is miniaturized to reduce device size, then device dimensions are reduced, but heat dissipation capability deteriorates
Solution Approach 1:
The patent transitions from planar 2D heat dissipation to 3D vertical heat dissipation by stacking multiple heat dissipation substrates above the computing die. This multi-layer configuration increases the heat dissipation surface area in the vertical dimension, allowing effective heat management in miniaturized devices where horizontal expansion is limited.
Solution Approach 2:
The heat dissipation system is divided into multiple separate substrates (first heat dissipation substrate, second heat dissipation substrate, etc.) rather than using a single monolithic structure. Each substrate can be independently optimized and positioned, allowing better thermal management across different regions of the computing die.
2Temperature
If coolant flow rate is increased to improve heat dissipation, then temperature reduction is enhanced, but flow uniformity deteriorates
Solution Approach 1:
The coolant distribution system is segmented into multiple independent channels across different heat dissipation substrates. This segmentation allows each channel to be independently optimized for uniform flow distribution, preventing localized overheating while maintaining overall high heat dissipation efficiency.
Solution Approach 2:
The patent introduces vertical distribution of coolant channels across multiple stacked substrates, transforming 2D flow patterns into 3D flow networks. This enables more uniform coolant distribution by delivering cooling fluid to multiple elevation levels simultaneously, improving both heat dissipation and flow uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the flow rate and uniformity of coolant, leading to improved heat dissipation and reduced temperature variations across the semiconductor dies, thereby enhancing the reliability and longevity of the semiconductor devices.
Implementation Method 1
the connection member has an inclined fluid channel that descends from the inlet to the base plate
Implementation Method 2
heat dissipation substrate with an inclined fluid channel and multiple heat dissipation substrates arranged to enhance coolant flow and thermal conductivity
Implementation Method 3
heat dissipation substrate...arranged to enhance coolant flow and thermal conductivity
Data Source
AI summary
A package structure including a reconstructed wafer, a heat dissipation substrate, a semiconductor device, and a fixing mechanism is provided. The heat dissipation substrate is disposed on a side of the reconstructed wafer and includes an inlet, a base plate located between the inlet and the reconstructed wafer, and a connection member located and coupled between the inlet and the base plate. The connection member has an inclined fluid channel that descends from the inlet to the base plate. The semiconductor device is disposed on another side of the reconstructed wafer, wherein the heat dissipation substrate and the semiconductor device are respectively located on opposite sides of the reconstructed wafer. The fixing mechanism fixes the reconstructed wafer, the heat dissipation substrate, and the semiconductor device together.