Incremental ADC Preset Loop Filter for Linear Conversion Startup

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Solution Overview

Problem

Incremental analog-to-digital converters (ADCs) face accuracy issues due to non-linear problems caused by the reset procedure of analog integrators, which affects the precision of the conversion process.

Innovation Solution

The introduction of a preset circuit that presets the output terminal of the loop filter during the reset phase, ensuring that the quantized signal is not zero at the beginning of each conversion cycle, allowing analog and digital integrators to operate within their linear regions, thereby reducing non-linear errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the reset procedure is applied to analog integrators in incremental ADC, then the integrators are prepared for the next conversion cycle, but non-linear problems are induced that affect conversion accuracy

Engineering Contradiction:
Improveconversion cycle readinessVSAvoidconversion accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by presetting the output terminal of the loop filter during the reset phase before the actual conversion begins. This preset value ensures that when conversion starts, the system is already in an optimal state that prevents non-linear errors, thus preparing the system in advance to avoid accuracy problems rather than correcting them after they occur.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If the quantized signal is reset to zero at the beginning of each conversion cycle, then the digital integrator is prepared for new conversion, but dramatic variations occur that cause non-linear errors

Engineering Contradiction:
Improveintegrator reset preparationVSAvoidlinearity accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent applies preliminary anti-action by introducing a preset circuit that counteracts the harmful effect of resetting the quantized signal to zero. Instead of allowing the signal to drop to zero (which causes dramatic variations), the preset circuit maintains a non-zero preset value that prevents the non-linear errors from occurring in the first place, thereby opposing the harmful effect before it can manifest.

Inventive Principle:
Principle #9Preliminary anti-action

3Duration of action of stationary object

If analog integrators are reset after each conversion cycle, then they are ready for the next cycle, but the transient response and accuracy are degraded

Engineering Contradiction:
Improveintegrator readiness for next cycleVSAvoidtransient response accuracy
Core Design Contradiction:
Duration of action of stationary objectVSMeasurement precision

Solution Approach 1:

The preset circuit performs preliminary action by establishing appropriate initial values in the analog integrators during the reset phase. This ensures that when the next conversion cycle begins, the integrators start from an optimized state that maintains accuracy and improves transient response, rather than starting from a completely reset state that would cause errors.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3734842B1Incremental analog-to-digital converter
Publication Date: 2023.08.09 MEDIATEK INC
  • EP3734842B1 patent drawingFigure 1
  • EP3734842B1 patent drawingFigure 2
  • EP3734842B1 patent drawingFigure 3

AI summary

An incremental analog-to-digital converter (ADC) with high accuracy. The incremental ADC has a delta-sigma modulator, performing delta-sigma modulation on an analog input signal to output a quantized signal, and a digital filter, receiving the quantized signal to generate a digital representation of the analog input signal. A loop filter of the delta-sigma modulator has a preset circuit. In the preset circuit, the output terminal of the loop filter is preset rather than being reset during the reset phase of the incremental ADC.