Structurally Independent Non-Volatile Memory Component for SoC Scaling
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Solution Overview
Problem
Existing System-on-Chip (SoC) devices face challenges with embedded non-volatile memory integration, particularly below 28 nm lithography nodes, leading to yield, cost, power consumption, reliability, and performance issues, and the need for extended memory capabilities.
Innovation Solution
A structurally independent non-volatile memory component is developed, manufactured in a dedicated flash memory technology, coupled to the SoC structure through interconnecting pads, allowing for a larger memory capacity and optimized logic circuitry, with a Direct Memory Access configuration and secure interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If embedded non-volatile memory is integrated in SoC devices below 28 nm lithography node, then memory capacity and integration are improved, but yield, reliability, and manufacturing precision deteriorate
Solution Approach 1:
The patent separates the non-volatile memory into a distinct memory component that is coupled to the SoC structure rather than being fully embedded within it. This segmentation allows the memory to be manufactured using dedicated flash memory technology processes while the SoC uses advanced 28 nm lithography, thereby maintaining high yield and reliability for both components while achieving high memory capacity integration.
2Quantity of substance
If embedded non-volatile memory is integrated in SoC devices, then memory capacity is improved, but power consumption increases
Solution Approach 1:
The patent introduces a direct memory access (DMA) controller as an intermediary between the SoC and the non-volatile memory component. This DMA controller enables efficient data transfer operations that reduce the power consumption burden on the main SoC processor, allowing large memory capacity while managing power consumption through optimized access patterns and reduced processor involvement in memory operations.
3Quantity of substance
If embedded non-volatile memory is integrated in SoC devices, then memory capacity is improved, but latency and performance deteriorate
Solution Approach 1:
The DMA controller serves as an intermediary that optimizes data access between the SoC and non-volatile memory, reducing latency by handling memory operations independently of the main processor. Additionally, the direct coupling architecture provides high-bandwidth interconnects that enable faster data transfer rates, compensating for the inherent latency of non-volatile memory and improving overall system performance while maintaining high memory capacity.
4Manufacturing precision
If dedicated flash memory technology is used for memory component, then manufacturing precision and reliability are improved, but device complexity increases
Solution Approach 1:
The patent segments the system into distinct functional components: the SoC structure and the separate non-volatile memory component. This segmentation allows each component to be manufactured using optimized processes (28 nm lithography for SoC, dedicated flash processes for memory) while managing complexity through standardized interfaces and a DMA controller that handles communication between components, thereby achieving high manufacturing precision without excessive overall system complexity.
Data Source
AI summary
The present disclosure relates to a memory component for a System-on-Chip (SoC) structure including at least a memory array and at least a logic portion for interacting with the memory array and with the SoC structure wherein the memory component is a structurally independent semiconductor device coupled to and partially overlapping the SoC structure.