Index Programming Method for Nonvolatile Memory Verify Reduction

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Solution Overview

Problem

Conventional non-volatile memory programming techniques require numerous verify operations, especially for multi-state memory cells, leading to increased programming time and reduced performance due to the need for verify cycles between each programming pulse, which becomes prohibitively time-consuming as the number of states increases.

Innovation Solution

The index programming method maintains a program index for each memory cell to control programming voltage levels, allowing incremental programming without intermediate verify steps by using a staircase pulse train and inhibiting further programming once the target voltage is reached, thereby reducing the need for verify operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional programming techniques with verify operations between each programming pulse are used, then programming accuracy is maintained, but programming time becomes prohibitively long for multi-state memory cells

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by establishing threshold voltage breakpoints and programming voltage levels before the actual programming operation. The system pre-calculates and stores the necessary voltage sequences and threshold values, allowing the programming process to proceed without repeated verify operations during the actual programming pulse application.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms by monitoring the threshold voltage of memory cells during programming and using this information to adjust subsequent programming voltage levels. The system continuously compares actual threshold voltages against target values and modifies the programming sequence accordingly, eliminating the need for exhaustive verify cycles while maintaining accuracy.

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If the number of programming pulses is increased to program multi-state memory cells, then programming completeness is improved, but the number of required verify operations increases prohibitively

Engineering Contradiction:
Improveprogramming completenessVSAvoidnumber of verify operations
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the programming process into distinct phases: a preliminary phase where threshold voltage breakpoints and programming voltage levels are established, and a main programming phase where memory cells are programmed using pre-planned voltage sequences. This segmentation separates the complexity of determining programming parameters from the execution of programming operations, reducing verify requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes by dynamically adjusting programming voltage levels based on the target memory state and the current state of the memory cell. The system changes voltage parameters adaptively, using different voltage sequences for different programming stages and different memory states, thereby completing programming without requiring proportional increases in verify operations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If verify operations are performed between each programming pulse, then programming reliability is ensured, but productivity is significantly reduced

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary determination of threshold voltage breakpoints and programming voltage levels before initiating the programming sequence. By pre-establishing these parameters through characterization data and pre-calculations, the system ensures programming reliability without needing to perform verify operations at every pulse, thereby maintaining high productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical verification process (physical verify operations between pulses) with an information-based approach using pre-stored threshold voltage data and predictive algorithms. The system substitutes repeated physical measurement and verification with computational predictions and pre-determined parameter sets, maintaining reliability while dramatically improving speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves programming performance by eliminating the need for verify operations between each programming pulse, allowing for faster and more accurate programming of memory cells, especially in multi-state memory systems.

Implementation Method 1

Both utilize a floating (unconnected) conductive gate, in a field effect transistor structure, positioned over a channel region in a semiconductor substrate... The threshold voltage characteristic of the transistor is controlled by the amount of charge that is retained on the floating gate.

Methodology Applied
Scientific EffectCharge storage:

Implementation Method 2

A programming operation on a memory cell is a process of changing the threshold voltage of the cell to a target threshold voltage level.

Methodology Applied
Scientific EffectElectrical programming:

Data Source

PatentUS7800945B2Method for index programming and reduced verify in nonvolatile memory
Publication Date: 2010.09.21 SAMSUNG ELECTRONICS CO LTD
  • US7800945B2 patent drawing
  • US7800945B2 patent drawing
  • US7800945B2 patent drawing

AI summary

In a non-volatile memory a group of memory cells is programmed respectively to their target states in parallel using a multiple-pass index programming method which reduces the number of verify steps. For each cell a program index is maintained storing the last programming voltage applied to the cell. Each cell is indexed during a first programming pass with the application of a series of incrementing programming pulses. The first programming pass is followed by verification and one or more subsequent programming passes to trim any short-falls to the respective target states. If a cell fails to verify to its target state, its program index is incremented and allows the cell to be programmed by the next pulse from the last received pulse. The verify and programming pass are repeated until all the cells in the group are verified to their respective target states. No verify operations between pulses are necessary.