Indirect Branch Instruction for SIMT Function Calls

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Solution Overview

Problem

Current SIMT architectures do not provide the ability to call functions and subroutines indirectly through function pointers, limiting their flexibility and performance in processing graphics data.

Innovation Solution

An indirect branch instruction is introduced that takes an address register as an argument to enable indirect function calls, allowing threads to branch independently and synchronize upon diverging paths, using an execution stack and controller to manage thread states and serialize execution for each unique pointer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If indirect function calls are enabled in SIMT architecture, then flexibility and processing performance are improved, but device complexity increases due to need for execution stack and thread state management

Engineering Contradiction:
ImproveflexibilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements indirect function calls by nesting thread state management within the existing SIMT execution framework. Each thread's function pointer and execution state are nested within thread-specific registers and the execution stack, allowing complex indirect calling behavior to be managed through layered data structures rather than requiring fundamental architectural changes.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The execution stack serves as an intermediary data structure that mediates between the indirect function call instruction and the actual function execution. It stores return addresses and thread states, enabling the processor to manage indirect calls without requiring complex control logic in the execution units themselves.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If threads execute different function pointers independently, then processing efficiency is improved through parallel execution, but control flow complexity increases due to thread divergence and synchronization requirements

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidcontrol flow complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the thread group into individual thread execution paths based on their function pointer values. Each thread maintains independent control flow through its own program counter and execution state, allowing threads with different function pointers to execute in parallel without interfering with each other, while the execution stack manages the segmentation of control flow states.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The execution model dynamically adapts to thread divergence by allowing threads to take different execution paths based on their function pointers. The system dynamically manages thread states through the execution stack, pushing and popping thread contexts as threads diverge and converge, enabling flexible control flow without static predetermined paths.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If function pointers are stored in address registers, then indirect function call capability is enabled, but register management complexity increases

Engineering Contradiction:
Improveindirect function call capabilityVSAvoidregister management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The address registers are designed to serve multiple functions: they store both direct function addresses and indirect function pointers, and can be used for both branch target addressing and function call parameter passing. This multi-functionality reduces the need for separate dedicated registers for each purpose, simplifying the overall register management architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9639365B2Indirect function call instructions in a synchronous parallel thread processor
Publication Date: 2017.05.02 NVIDIA CORP
  • US9639365B2 patent drawing
  • US9639365B2 patent drawing
  • US9639365B2 patent drawing

AI summary

An indirect branch instruction takes an address register as an argument in order to provide indirect function call capability for single-instruction multiple-thread (SIMT) processor architectures. The indirect branch instruction is used to implement indirect function calls, virtual function calls, and switch statements to improve processing performance compared with using sequential chains of tests and branches.