Inductor Bypass Path for Voltage Spike Suppression in Energy Efficient Networks
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Solution Overview
Problem
Energy-efficient Ethernet networks face challenges in minimizing power consumption during low link utilization periods without compromising latency-sensitive traffic patterns, and existing solutions for switching between energy saving states often result in voltage spikes that require larger, more expensive capacitors and increased PCB space.
Innovation Solution
An external inductor bypass path is created using an FET transistor to suppress voltage spikes during transitions between energy saving states, allowing the use of standard-sized capacitors and avoiding increased costs and real estate requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If switching between energy saving states is implemented, then energy consumption is reduced, but voltage spikes occur requiring larger capacitors
Solution Approach 1:
The patent extracts and removes the harmful voltage spike phenomenon from the system by introducing an external bypass path that diverts the spike away from the capacitor, allowing standard-sized capacitors to be used while maintaining energy-saving switching functionality
Solution Approach 2:
The patent introduces an external bypass path as an intermediary element that mediates between the voltage spike generation during state transitions and the capacitor, preventing the spike from affecting the capacitor and eliminating the need for oversized components
2Use of energy by moving object
If switching between energy saving states is implemented, then power management is improved, but voltage spikes increase hardware complexity
Solution Approach 1:
The patent extracts the voltage spike problem from the internal circuitry and routes it through an external bypass path, simplifying the internal design while maintaining power management capabilities
Solution Approach 2:
The external bypass path serves as a mediator that handles the voltage spike management externally, allowing the main device to maintain simple internal architecture while still achieving effective power management through state transitions
3Stability of the object's composition
If larger capacitors are used to suppress voltage spikes, then voltage stability is improved, but PCB space increases
Solution Approach 1:
The patent extracts the voltage spike suppression function from the capacitor and relocates it to an external bypass path, allowing standard-sized capacitors to maintain voltage stability without requiring additional PCB space
Solution Approach 2:
The external bypass path acts as an intermediary that handles voltage spike suppression externally, freeing up PCB space while maintaining voltage stability through the bypass mechanism rather than through oversized capacitors
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient power management by allowing rapid switching between energy saving states without voltage spikes, thus optimizing energy savings while maintaining network performance and reducing hardware costs.
Implementation Method 1
An external inductor bypass path is created using an FET transistor to suppress voltage spikes during transitions between energy saving states
Data Source
AI summary
A system and method for switching in an energy efficient network. Rapid switching between multiple operating modes can generate a voltage spike or voltage lag on an on-board inductor. Suppression of the voltage spike or voltage lag can be enabled through the activation of by a physical layer device of an inductor bypass path at a time proximate to the switching between multiple operating modes.