Industrial Data Timestamp Monitoring With Virtual Clock Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Industrial data acquisition devices often have unstable system clocks, leading to inaccurate synchronization and poor timekeeping, which affects the accuracy of data correlation and analysis in industrial environments.

Innovation Solution

A method and system that utilize a virtual clock with constant time steps to index data and a software module to predict and correct real clock timestamps, ensuring accurate synchronization across different data acquisition devices without hardware changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If NTP protocol is used for synchronization, then data streams from different data acquisition devices can be synchronized, but synchronization accuracy deteriorates when devices have poor clock quality

Engineering Contradiction:
Improvesynchronization capabilityVSAvoidsynchronization accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces a virtual clock as an intermediary between the real clock and the data streaming process. The virtual clock receives timestamps from the unstable real clock, predicts expected timestamps based on constant time steps, and corrects deviations. This mediator isolates the data acquisition system from real clock instability while maintaining synchronization capability across multiple devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback by continuously comparing real clock timestamps with predicted timestamps from the virtual clock. When deviations exceed a threshold, the system adjusts the virtual clock's time steps to compensate for real clock instability, creating a closed-loop correction mechanism that maintains synchronization accuracy despite hardware clock quality issues.

Inventive Principle:
Principle #23Feedback

2Reliability

If cycle frequency based synchronization is used, then time correlation can be established between devices, but accuracy deteriorates over long time spans due to error accumulation

Engineering Contradiction:
Improvetime correlation capabilityVSAvoidsynchronization accuracy over time
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The virtual clock dynamically adjusts its time step calculations based on the actual performance of the real clock. Instead of using fixed cycle frequencies, the system continuously monitors timestamp deviations and adapts the virtual clock's progression rate, preventing error accumulation over long periods while maintaining time correlation between devices.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If hardware changes are made to improve clock stability, then timestamp accuracy improves, but system complexity and cost increase

Engineering Contradiction:
Improvetimestamp accuracyVSAvoidhardware requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces the need for stable hardware clocks with a software-based virtual clock mechanism. Instead of relying on hardware improvements, the system uses algorithmic timestamp prediction and correction in the software layer, achieving high timestamp accuracy without modifying physical clock hardware, thereby avoiding increased device complexity and cost.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP4555393B1Methods and systems for monitoring timestamps in a data acquired by data acquisition devices in an industrial environment
Publication Date: 2025.09.24 SIEMENS AG
  • EP4555393B1 patent drawingFigure 1
  • EP4555393B1 patent drawingFigure 2
  • EP4555393B1 patent drawingFigure 3

AI summary

Method for monitoring timestamps in a data (100) acquired by a data acquisition device (101,201a,..., 201n,302,303), wherein the data acquisition device (101,201a,..., 201n,302,303) comprises a real clock (203a,...,203n), according to which the timestamps (102) are allocated to the data, and a virtual clock (202a,...,202n) progressing in essentially constant steps, according to which the data (100) is indexed (103), the method comprising: - receiving an index value (103, 103a) and a respective timestamp (102, 102a) from the data (100), - predicting a timestamp for a subsequent index value, based on the index value and the respective timestamp and on preceding index values (103) and respective timestamps (102), to generate a predicted timestamp for the subsequent index value, - receiving a real clock timestamp for the subsequent index value, - based on an acceptance criterion related to the real clock timestamp and to the predicted timestamp, providing the real clock timestamp or the predicted timestamp for the subsequent index value.