In-Memory Special Function Unit Offloads Complex Math Operations

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Solution Overview

Problem

In computing environments, processors face limitations in performance due to limited communication bandwidth with memory and high energy consumption, particularly when processing complex operations like square root, reciprocal, log, exponential, and trigonometric functions, which are inefficiently handled by software libraries.

Innovation Solution

A computing system with a host processor offloads specific operations to an internal processor-in-memory (PIM) with a special function unit (SFU), bypassing the cache and directly processing these operations in memory, reducing memory access bandwidth and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If complex operations (square root, reciprocal, log, exponential, trigonometric functions) are processed using software libraries on the host processor, then processing flexibility is maintained, but processing speed and energy efficiency deteriorate

Engineering Contradiction:
Improveprocessing speedVSAvoidsoftware library dependency
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The host processor is segmented from the memory system by introducing a dedicated internal processor within the memory device. Complex operations are separated from general-purpose processing and assigned to specialized hardware logic (SFU) in the internal processor, enabling parallel execution and improving processing speed while reducing host processor burden.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An internal processor is introduced as an intermediary between the host processor and memory array. This intermediary contains a special function unit that handles complex mathematical operations, acting as a bridge that offloads computation-intensive tasks from the host processor while maintaining close proximity to data storage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the host processor processes all operations, then processing control is centralized, but communication bandwidth with memory becomes a bottleneck

Engineering Contradiction:
Improveprocessing throughputVSAvoidcommunication bandwidth consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The internal processor merges computation and memory access functions by placing a special function unit directly within the memory device. This allows complex operations to be performed on data while it resides in memory, eliminating the need for repeated data transfers between host processor and memory, thereby reducing communication bandwidth consumption and energy usage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The architecture transitions from a single-processor model to a distributed processing model by adding a second processing dimension within the memory device. The internal processor operates in parallel with the host processor, creating a two-level processing hierarchy that increases overall throughput without saturating the host-memory communication channel.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Use of energy by moving object

If the host processor handles all computational tasks, then processing uniformity is maintained, but energy consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessing capability
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

Different parts of the processing system are assigned different qualities and functions. The host processor maintains general-purpose control and coordination capabilities, while the internal processor's special function unit provides localized high-performance computation for specific mathematical operations. This division allows energy-efficient processing by matching task requirements to appropriate processing resources.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically routes computational tasks based on their nature. Simple operations continue to be handled by the host processor maintaining processing uniformity, while complex mathematical operations are dynamically offloaded to the internal processor's SFU. This dynamic task allocation reduces overall energy consumption while preserving the system's versatility through adaptive task distribution.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10613871B2Computing system and method employing processing of operation corresponding to offloading instructions from host processor by memory's internal processor
Publication Date: 2020.04.07 SAMSUNG ELECTRONICS CO LTD
  • US10613871B2 patent drawing
  • US10613871B2 patent drawing
  • US10613871B2 patent drawing

AI summary

A computing system includes a host processor configured to process operations and a memory configured to include an internal processor and store host instructions to be processed by the host processor. The host processor offloads processing of a predetermined operation to the internal processor. The internal processor possibly provides specialized hardware designed to process the operation efficiently, improving the efficiency and performance of the computing system.