Input Buffer Circuit With Asymmetric Thresholds For Voltage Domain Adaptation

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Solution Overview

Problem

The miniaturization of integrated circuits has led to stricter design and manufacturing specifications, with challenges in ensuring that input voltage signals from one power domain can be safely coupled to electronic circuits in a different power domain without exceeding the maximum durable voltage of the receiving circuits.

Innovation Solution

An input buffer circuit with asymmetry upper and lower threshold circuits that generate enabling signals to control switches, allowing the output voltage to change between voltage levels based on the input voltage signal crossing predefined thresholds, thereby adapting the signal to the voltage range of the receiving circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the input voltage signal is directly coupled to the receiving circuit, then the signal transmission is simple and fast, but the receiving circuit may be damaged by voltage overload

Engineering Contradiction:
Improvereceiving circuit safetyVSAvoidinput buffer circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

An input buffer circuit is introduced as an intermediary component between the input voltage signal source and the receiving circuit. The buffer circuit includes threshold circuits that compare the input voltage against predefined thresholds and generate enabling signals to control switches, thereby adapting the input voltage to safe levels for the receiving circuit while preventing voltage overload.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The input buffer circuit dynamically changes the voltage parameter of the signal by using threshold circuits to generate enabling signals that control switches. When the input voltage exceeds safe thresholds, the circuit transforms the voltage level to prevent overload, thus protecting the receiving circuit while maintaining signal integrity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the voltage threshold is fixed, then the circuit design is simple, but the circuit cannot adapt to different power domain requirements

Engineering Contradiction:
Improvepower domain adaptationVSAvoidthreshold circuit configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The input buffer circuit employs dynamic threshold selection by using multiple threshold circuits with different threshold values. The appropriate threshold circuit is activated based on the power domain requirements, allowing the circuit to adapt its voltage threshold dynamically rather than using a fixed threshold, thus enabling versatility across different power domains.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The input buffer circuit is designed with multiple threshold circuits that can handle different power domain requirements. This multi-functional design allows a single circuit to serve multiple purposes by adapting to different voltage thresholds, making the circuit universally applicable across various power domain configurations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250274122A1Input buffer circuit having variable threshold circuits
Publication Date: 2025.08.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250274122A1 patent drawing
  • US20250274122A1 patent drawing
  • US20250274122A1 patent drawing

AI summary

An integrated circuit includes an asymmetry upper threshold circuit outputting an upper-branch enabling signal, an asymmetry lower threshold circuit outputting a lower-branch enabling signal, and a control circuit which changes an output voltage when the logic levels of the upper-branch enabling signal and the lower-branch enabling signal are changed consecutively. The upper-branch enabling signal is set to a first upper-branch logic level when an input voltage received by the integrated circuit rises across a main upper threshold, and to a second upper-branch logic level when the input voltage falls across a supplementary upper threshold which is higher than the main upper threshold. The lower-branch enabling signal is set to a first lower-branch logic level when the input voltage falls across a main lower threshold, and to a second lower-branch logic level when the input voltage rises across a supplementary lower threshold which is lower than the main lower threshold.