Differential Input Buffer With Replica Common-Mode Feedback

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Solution Overview

Problem

Conventional input buffers, particularly static buffers, are vulnerable to noise and unsuitable for semiconductor chips requiring input signals with small swing magnitudes and high operating frequencies, as they struggle to control common mode output signal variations due to process, voltage, and temperature (PVT) fluctuations.

Innovation Solution

An input buffer design comprising a first buffer circuit for differential signal amplification, a replica second buffer circuit for generating a common mode output signal, and a detector to compare this signal with a reference, adjusting the bias currents to match the common mode output signal with the reference, thereby controlling its level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a static input buffer is used, then the structure is simple, but it is weak against noise and cannot handle high operating frequencies

Engineering Contradiction:
Improvebuffer structureVSAvoidnoise tolerance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The input buffer is divided into two independent circuits: a first buffer circuit for differential signal amplification and a second buffer circuit (replica) for generating the common mode output signal. This segmentation allows each circuit to be optimized for its specific function, with the replica circuit dedicated to common mode control, thereby improving noise tolerance while maintaining manageable complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A replica circuit (second buffer circuit) is created as a copy of the first buffer circuit. This replica generates a common mode output signal that mirrors the behavior of the main buffer, enabling accurate monitoring and control of common mode variations without interfering with the primary signal amplification function.

Inventive Principle:
Principle #26Copying

2Reliability

If a differential amplifier type input buffer is used, then noise tolerance is improved, but the common mode output signal varies according to PVT variations

Engineering Contradiction:
Improvenoise toleranceVSAvoidcommon mode output signal level
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

A detector is implemented to continuously monitor the common mode output signal level and generate control signals based on the detected level. This feedback mechanism allows the system to automatically adjust and maintain the common mode output signal at the desired level despite PVT variations, ensuring stability while preserving the noise tolerance benefits of the differential amplifier structure.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses its own output signal (common mode signal) to generate the control signal through the detector. The common mode output signal feeds back into the control signal generation process, creating a self-regulating mechanism that automatically compensates for PVT variations without requiring external intervention.

Inventive Principle:
Principle #25Self-service

3Stability of the object's composition

If the common mode output signal level is controlled using a detector and control signals, then PVT variation stability is improved, but the device complexity increases

Engineering Contradiction:
Improvecommon mode output signal levelVSAvoidbuffer circuit structure
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The control signal generation function is merged with the existing buffer circuits by using the detector to process the common mode output signal directly. The detector and control signal generation are integrated into the overall buffer structure, allowing common mode control to be achieved without adding completely separate control systems, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8891329B2Input buffer
Publication Date: 2014.11.18 SAMSUNG ELECTRONICS CO LTD
  • US8891329B2 patent drawing
  • US8891329B2 patent drawing
  • US8891329B2 patent drawing

AI summary

An input buffer includes a first buffer circuit to amplify a difference between a first input signal and a second input signal; a second buffer circuit formed of a replica circuit of the first buffer circuit to generate a common mode output signal in response to the first input signal; and a detector to compare the common mode output signal with a reference output signal and to control the first and second buffer circuits according to the comparison result such that a level of the common mode output signal coincides with a level of the reference output signal.