Input Buffer Feedback Circuit Signal Amplitude Control

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Solution Overview

Problem

Existing input buffers in semiconductor integrated circuits experience a decrease in signal amplitude due to feedback circuits, which limits their performance and operational speed.

Innovation Solution

The implementation of a feedback circuit with a variable resistor and a feedback inverter, where the feedback resistor can be adjusted and the logic threshold voltage of the inverter is adjustable, allowing for independent control of the amplification signal and preventing voltage decrease at the output node, thereby maintaining high-speed operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a feedback circuit is included in the input buffer to control the amplification signal, then the buffer output signal can be stabilized, but the amplitude of the signal decreases

Engineering Contradiction:
Improvebuffer output signal stabilityVSAvoidsignal amplitude
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

A separate feedback inverter circuit is introduced as an intermediary component between the first buffer and the second buffer circuit. This feedback inverter receives the amplification signal from the first buffer, applies feedback control through a feedback resistor, and outputs the controlled signal to the second buffer circuit, thereby preventing direct amplitude degradation while maintaining signal stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The input buffer is divided into separate functional modules: a first buffer for signal amplification, a feedback circuit with feedback inverter for signal control, and a second buffer circuit for buffering the controlled signal. This segmentation allows the feedback control function to be isolated from the amplification function, preventing amplitude degradation while maintaining stability.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If the feedback resistor value is fixed, then the circuit structure is simple, but the logic threshold voltage cannot be adjusted to match different operating conditions

Engineering Contradiction:
Improvecircuit structureVSAvoidlogic threshold voltage adjustability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The feedback resistor is designed as a variable resistor that can dynamically adjust its resistance value based on operating conditions. This allows the logic threshold voltage of the feedback inverter to be adjusted accordingly, enabling the circuit to adapt to different operating conditions while maintaining a relatively simple overall structure.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The resistance value of the feedback resistor is made changeable to adjust the logic threshold voltage of the feedback inverter. By varying the resistance parameter, the circuit can adapt to different operating conditions such as different input signal characteristics or temperature conditions, improving versatility without significantly increasing complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9214202B2Input buffer and memory device including the same
Publication Date: 2015.12.15 SAMSUNG ELECTRONICS CO LTD
  • US9214202B2 patent drawing
  • US9214202B2 patent drawing
  • US9214202B2 patent drawing

AI summary

An input buffer includes a first buffer, a feedback circuit and a second buffer circuit. The feedback circuit includes a feedback resistor and a feedback inverter. The first buffer may be configured to output an amplification signal to an output node of the first buffer based on an input signal. The feedback circuit connected to the output node of the first buffer may be configured to control the amplification signal. The second buffer circuit may be configured to output a buffer output signal by buffering the amplification signal. The feedback resistor may receive the amplification signal from the output node of the first buffer and provide a feedback signal to a feedback node. The feedback inverter is connected between the feedback node and the output node. The feedback inverter may be configured to control the amplification signal based on the feedback signal.