Pseudo-Differential Input Buffer for High CMRR Rail-to-Rail Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional rail-to-rail buffers suffer from poor common mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) during transitions between differential input pairs, particularly when both pairs are activated, which affects the accuracy and noise rejection in high-resolution ΣΔ Analog-to-Digital Converters (ADCs).
Innovation Solution
A pseudo-differential input buffer configuration using a pair of amplifiers with complementary differential input pairs, where only one type (p-type or n-type) is activated at a time, utilizing hysteretic comparators to select the appropriate pair based on the analog input signal level, and incorporating chopping techniques to achieve rail-to-rail input voltage range without crossover distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional rail-to-rail buffers activate both differential input pairs during transitions, then the input voltage range is extended, but the common mode rejection ratio and power supply rejection ratio deteriorate
Solution Approach 1:
The patent implements dynamic switching between p-type and n-type differential input pairs based on the input common mode voltage level. A control circuit monitors the common mode voltage and selectively activates either the p-type pair (for lower voltage ranges) or the n-type pair (for higher voltage ranges), ensuring optimal CMRR and PSRR performance across the entire rail-to-rail input range without the degradation that occurs when both pairs are simultaneously activated.
2Adaptability or versatility
If conventional buffers use both differential input pairs simultaneously, then the buffer can handle wider voltage swings, but noise and offset errors increase
Solution Approach 1:
The patent introduces a control circuit as an intermediary that manages the activation of differential input pairs. This control circuit monitors the input common mode voltage level and selectively enables either the p-type or n-type differential pair, preventing simultaneous activation. This intermediary control mechanism ensures clean signal transmission with minimal noise and offset errors while still accommodating wide voltage swings through seamless switching between pairs.
3Reliability
If an input buffer is added to isolate the sampling capacitor from the analog signal source, then the source impedance can be increased for R/C filtering, but the device complexity increases
Solution Approach 1:
The patent designs the input buffer with multi-functional capability, integrating several functions into a single circuit structure. The buffer provides sampling capacitor isolation, supports rail-to-rail input voltages, maintains high CMRR and PSRR, and enables high source impedance operation for R/C filtering. By combining these functions into one universal buffer circuit rather than separate components, the patent achieves reliable isolation while minimizing the increase in overall device complexity.
Data Source
AI summary
A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.