Input-Level Shifter for Voltage Domain Crossing
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Solution Overview
Problem
Existing data storage devices face challenges in efficiently handling voltage domain crossings, leading to power consumption issues and clock skew due to the need for multiple level shifters at the output, which increases complexity and area usage.
Innovation Solution
Implementing a level shifter at the input of the data storage device to shift data from a first voltage domain to a second voltage domain before storage, allowing for a single level shifter to be used instead of multiple shifters at the outputs, and using different clock signals for reading and writing to avoid clock skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple level shifters are positioned at the output of the memory device for each output, then data can be properly level-shifted to the second voltage domain, but the device complexity and area usage increase
Solution Approach 1:
The patent inverts the conventional approach by positioning the level shifter at the input of the memory device rather than at the output. This single level shifter converts the input signal from the first voltage domain to the second voltage domain before storage, eliminating the need for multiple level shifters at each output and resolving the contradiction between reliable data transmission and device complexity
Solution Approach 2:
The single level shifter at the input serves a universal function for all data inputs, converting signals from the first voltage domain to the second voltage domain regardless of which output will eventually use the data. This multi-functional approach replaces the need for dedicated level shifters at each output, reducing overall device complexity while maintaining transmission accuracy
2Device complexity
If a single clock signal is used to transmit data over the voltage domain crossing, then the system is simpler, but clock skew occurs between the first and second voltage domains
Solution Approach 1:
The patent segments the clocking system by associating different clock signals with different voltage domains. The first voltage domain uses its own clock signal for write operations, while the second voltage domain uses a separate clock signal for read operations. This segmentation prevents clock skew by ensuring that each voltage domain operates with its own timing reference, maintaining reliability while accepting increased clock signal configuration complexity
3Reliability
If level shifters are positioned at the output of the memory device, then data can be level-shifted for each output, but the area usage increases
Solution Approach 1:
The patent inverts the conventional output-level approach by performing level shifting at the input of the memory device. This single input-level shifter converts all incoming data from the first voltage domain to the second voltage domain, eliminating the need for multiple output-level shifters and significantly reducing chip area while maintaining voltage domain compatibility through the same level-shifting function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of level shifters required, conserves area, and prevents clock skew by shifting data at the input, thereby enhancing power management and operational efficiency in data storage.
Implementation Method 1
Data to be stored at the data storage device is level shifted from a level of a first voltage domain to a level of a second voltage domain prior to storing the data within the data storage device
Data Source
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AI summary
According to an embodiment, an apparatus includes a data storage device. Data to be stored in the data storage device is level shifted from a first voltage domain to a second voltage domain prior to being stored within the data storage device. The data storage device is powered by the second voltage domain. The apparatus further includes a circuit that is powered by the second voltage domain and that is responsive to data output by the data storage device.