Instruction Memory Integrity Checking Against Smart Card Glitch Attacks

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Solution Overview

Problem

Existing smart card security technologies are susceptible to hacking, particularly from laser-based and glitch-type attacks, which can disrupt the execution of instructions and compromise data integrity.

Innovation Solution

A memory system that includes a central processing unit and a memory with error detector code values for instructions and data, which compares these values to detect changes and initiate defensive measures such as resetting the system in case of detected hacking attempts, using a compare PD instruction automatically inserted during compilation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error detector code values are calculated and transmitted with every data transfer, then data integrity and security are improved, but communication overhead and processing time increase

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Error detector code values are pre-calculated and stored alongside the instruction code during the instruction compilation phase. This preliminary action eliminates the need for real-time error detection calculations during execution, maintaining data integrity while minimizing processing time overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The error detector code value is generated as a companion copy of the instruction code, stored in parallel. This copying approach allows simultaneous transmission and verification without sequential processing delays, improving both reliability and time efficiency.

Inventive Principle:
Principle #26Copying

2Reliability

If the central processing unit detects changes in fetched instructions, then security against hacking is improved, but the complexity of the processing system increases

Engineering Contradiction:
ImprovesecurityVSAvoidprocessing system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A copy of the instruction code is stored in the storage device along with its corresponding error detector code value. This copying mechanism enables simple comparison operations in the CPU to detect hacking attempts, providing enhanced security through a straightforward duplicate-storage approach rather than complex verification systems.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20100174888A1Memory System
Publication Date: 2010.07.08 SAMSUNG ELECTRONICS CO LTD
  • US20100174888A1 patent drawing
  • US20100174888A1 patent drawing
  • US20100174888A1 patent drawing

AI summary

A memory system includes a storage device storing a plurality of instructions and a central processing unit processing an instruction fetched from the storage device, wherein the central processing unit detects a change in the instruction fetched from the storage device while processing the instruction.