Insulated-Gate Device Driving Circuit with Depletion MOSFET Pull-Up

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Solution Overview

Problem

Existing insulated-gate type device driving circuits fail to prevent accidental turn-on and high-speed turn-off of insulated-gate devices, especially when power MOSFETs are in an OFF state, due to parasitic capacitance and voltage fluctuations, leading to increased Ron and current consumption.

Innovation Solution

A gate voltage control semiconductor element connected between the gate and source of the insulated-gate semiconductor element, with a pull-up element formed by a depletion type MOSFET between the gate and drain, where the back gate of the MOSFET is grounded, utilizing the charging current from parasitic capacitance to rapidly extract charging current without relying on input circuit impedance or OFF-time voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a current source circuit is provided to discharge gate capacitance to turn OFF the power MOSFET, then the power MOSFET can be turned OFF, but the power MOSFET may be turned ON by mistake due to current flowing through parasitic capacitance between gate and drain when power supply suddenly increases

Engineering Contradiction:
Improveprevention of accidental turn-onVSAvoidcircuit configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A gate voltage control element is introduced as an intermediary between the gate terminal and the power MOSFET gate. This intermediary element actively controls the gate voltage to prevent accidental turn-on while maintaining simple circuit configuration. The gate voltage control element responds to voltage changes at the gate terminal and adjusts the gate voltage accordingly to prevent parasitic capacitance from causing unwanted turn-on.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If output current of the current source circuit is kept at a predetermined current value or higher to prevent accidental turn-on, then accidental turn-on is prevented, but the gate voltage of the power MOSFET in normal ON state is decreased causing increase in Ron and current consumption

Engineering Contradiction:
Improveprevention of accidental turn-onVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The gate voltage control element dynamically adjusts its operation based on the state of the power MOSFET. When the power MOSFET is in normal ON state, the gate voltage control element maintains appropriate gate voltage to prevent Ron increase. When voltage sudden increase occurs, the gate voltage control element activates to prevent accidental turn-on. This dynamic control prevents accidental turn-on without causing increased current consumption during normal operation.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If all elements are integrated on a single semiconductor substrate, then chip size is reduced and manufacturing is simplified, but parasitic PNP transistors may be formed affecting circuit performance

Engineering Contradiction:
Improveintegration capabilityVSAvoidparasitic PNP transistor formation
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The invention acknowledges that integrating all elements on a single semiconductor substrate will inevitably form parasitic PNP transistors, but designs the gate voltage control element to actively compensate for and neutralize the harmful effects of these parasitic structures. The gate voltage control element's operation is specifically tailored to counteract the influence of parasitic PNP transistors, thereby converting the potential harm into an acceptable condition that does not affect circuit performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents accidental turn-on and enables high-speed turn-off of insulated-gate devices, reduces chip size, and minimizes current consumption and Ron, while allowing integration of all elements on a single semiconductor substrate without forming parasitic PNP transistors.

Implementation Method 1

no measure against sudden increase in power supply when a power MOSFET is in an OFF state has been taken in the background-art example described in JP-A-2008-67593. Therefore, in such a situation, the power MOSFET which is in an OFF state may be turned ON by mistake due to a current flowing into a gate of the power MOSFET through a parasitic capacitance between the gate and a drain of the power MOSFET.

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS9490793B2Insulated-gate type device driving circuit
Publication Date: 2016.11.08 FUJI ELECTRIC CO LTD
  • US9490793B2 patent drawing
  • US9490793B2 patent drawing
  • US9490793B2 patent drawing

AI summary

An insulated-gate type device driving circuit for driving an insulated-gate semiconductor element based on a gate signal inputted from the outside includes a gate voltage control semiconductor element which is connected between a gate and a source of the insulated-gate semiconductor element, and a pull-up element which is constituted by a depletion type MOSFET connected between a gate and a drain of the gate voltage control semiconductor element. The gate voltage control semiconductor element is driven by a voltage applied to the gate of the insulated-gate semiconductor element, and a back gate of the MOSFET constituting the pull-up element is grounded to prevent a parasitic transistor from being formed.