Insulating Structure Layout for Gate-All-Around Leakage Isolation
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Solution Overview
Problem
The challenge in manufacturing high-performance semiconductor devices with fine patterns and high integration is the need for precise control of micropatterns and spacings, particularly in FinFETs with three-dimensional channels, to overcome limitations in planar MOSFETs.
Innovation Solution
A semiconductor device design featuring first and second active regions with insulating structures, channel layers, gate structures, and source/drain regions, where the insulating structures extend beyond the source/drain regions to enhance spacing and isolation, and include different materials for the insulating layers to improve leakage current blocking and process efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulating structures are extended beyond source/drain regions to enhance spacing and isolation, then leakage current blocking is improved, but manufacturing complexity increases
Solution Approach 1:
The insulating structure is divided into multiple segments: a first insulating structure extending from the active region to contact the lower surface of the channel layer, and a second insulating structure extending from the source/drain region. This segmentation allows each portion to perform its specific function optimally while managing overall complexity.
Solution Approach 2:
The insulating structures are configured to extend in multiple dimensions - vertically extending from the active region to contact the channel layer lower surface, and laterally extending to contact the source/drain region. This multi-dimensional configuration enhances isolation effectiveness without proportionally increasing manufacturing complexity.
2Reliability
If different materials are used for first and second insulating structures, then leakage current blocking is improved, but manufacturing process complexity increases
Solution Approach 1:
Different insulating materials are assigned to different regions: the first insulating structure uses a material optimized for contacting the channel layer and providing vertical isolation, while the second insulating structure uses a material optimized for contacting the source/drain region. This local differentiation improves leakage blocking while managing manufacturing complexity through targeted material selection.
Data Source
AI summary
A method for manufacturing a semiconductor device includes forming a stack structure including sacrificial layers and channel layers alternately stacked on a substrate, etching the sacrificial layers, the channel layers, and the substrate to form an active structure, forming a device isolating layer covering a side surface of the active fin and a side surface of a lowermost sacrificial layer, forming a sacrificial gate structure, partially removing the active structure to form a recess, forming a source/drain region on a lowermost sacrificial layer in the recess, partially removing the device isolation layer, removing the lowermost sacrificial layer and exposing an upper surface of the active fin, forming an insulating structure covering the upper surface of the active fin and surrounding the source/drain region, removing the sacrificial gate structure and the sacrificial layers, and forming a gate structure.