Insulation Layer Patterning with Width Control Spacers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods face challenges in forming minute insulation layer patterns and semiconductor devices with small openings due to limitations in photo process resolution, leading to defects and non-uniformity in inner spacers.
Innovation Solution
A method involving the formation of an insulation layer pattern with width control spacers and multiple photo processes to create precise openings, using an organic layer, hard mask layers, and etching masks to achieve minute dimensions without defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photo process is used to form minute patterns, then manufacturing simplicity is maintained, but manufacturing precision deteriorates due to resolution limits
Solution Approach 1:
The patent divides the single photo process into multiple sequential photo processes (first photo process forming preliminary hard mask pattern, second photo process forming hard mask pattern with additional openings). This segmentation allows each photo process to work within its resolution capabilities while achieving overall precision beyond what a single process could deliver.
Solution Approach 2:
The patent performs preliminary patterning to form the preliminary hard mask pattern before forming the final hard mask pattern. This preliminary action creates a foundation structure that guides subsequent patterning steps, enabling precise formation of minute openings that would be impossible with a single direct photo process.
2Manufacturing precision
If self align contact process is used, then manufacturing precision improves for contacts with peripheral patterns, but ease of manufacture deteriorates when peripheral patterns are absent
Solution Approach 1:
The patent introduces an organic layer as an intermediary between the insulation layer and the hard mask layers. This organic layer serves as a sacrificial etching mask that enables precise formation of openings without requiring peripheral patterns, making the process applicable to both cases with and without peripheral patterns while maintaining high precision.
3Manufacturing precision
If inner spacer is formed in opening, then manufacturing precision of minute openings improves, but reliability deteriorates due to non-uniform formation
Solution Approach 1:
The patent uses width control spacers that are formed through self-aligned processes where the spacer width is determined by the thickness of conformally deposited layers rather than by photo lithography dimensions. This self-service mechanism ensures uniform spacer formation that is independent of photo process variations, achieving both precision and reliability.
4Manufacturing precision
If multiple photo processes are used to form minute patterns, then manufacturing precision improves, but productivity deteriorates due to increased process steps
Solution Approach 1:
The patent combines multiple patterning functions into a unified multi-step process flow where the preliminary hard mask pattern and hard mask pattern are formed in sequence. This merging of functions allows the process to achieve high precision while maintaining efficient process integration, avoiding the need for separate redundant processing lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of insulation layer patterns with openings as small as 30 nm, improving integration density in semiconductor devices and reducing defects, particularly in forming plugs and capacitors.
Implementation Method 1
An etching mask pattern is formed by etching the organic layer using the hard mask pattern as an etching mask
Implementation Method 2
The insulation layer pattern having third openings is formed by etching the insulation layer using the etching mask pattern as an etching mask
Data Source
AI summary
In a method of forming an insulation layer pattern, an insulation layer is formed on a substrate. An organic layer and a hard mask layer are successively formed on the insulation layer. A preliminary hard mask pattern having first openings is formed by patterning the hard mask layer. A hard mask pattern having the first openings and second openings is formed by patterning the preliminary hard mask pattern. Width control spacers are formed on sidewalls of the first and the second openings. An etching mask pattern is formed by etching the organic layer using the hard mask pattern as an etching mask. The insulation layer pattern having third openings is formed by etching the insulation layer using the etching mask pattern as an etching mask.