Integer Division via Floating-Point Hardware Intermediary

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Solution Overview

Problem

Current computer processors lack efficient hardware support for integer division, leading to significant computing time and cycles consumed by software implementations, especially for higher precision operations like 64-bit integer division, which is slower than floating-point division even when using lower precision hardware.

Innovation Solution

A method that subdivides the numerator into partitions and converts the denominator to perform integer division using floating-point operations, iteratively refining the quotient approximation by subtracting product corrections, leveraging floating-point hardware to achieve higher precision integer division.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If integer division is implemented in software using shift and subtract algorithms, then the operation can be performed on processors without dedicated integer division hardware, but the computing time and cycles consumed are significant

Engineering Contradiction:

Improveprocessor design simplicityVSAvoidinteger division computing time

Core Design Contradiction:

Ease of manufactureVSLoss of time

Solution Approach 1:

The patent uses floating-point hardware as an intermediary to perform integer division operations. By converting integers to floating-point format, performing the division using the FPU, and then converting back to integer format, the system leverages existing floating-point hardware capabilities to achieve fast integer division without adding dedicated integer division hardware to the processor.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical/software-based shift and subtract algorithm with a hardware-based floating-point division operation. This substitution leverages the optimized hardware circuitry of the FPU to perform division operations that would otherwise require multiple software instruction cycles, dramatically reducing computation time.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If floating-point hardware is used to perform integer division, then computing speed is improved, but precision is lost when the integer bit size exceeds the floating-point mantissa precision

Engineering Contradiction:

Improvedivision operation speedVSAvoidinteger division precision

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments the integer division operation into multiple stages: conversion to floating-point format, execution of floating-point division, and conversion back to integer format. This segmentation allows the system to leverage fast floating-point hardware while managing precision limitations through structured processing steps.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the numerical representation parameter from integer format to floating-point format during the division operation, then converts back. This parameter transformation enables the use of hardware optimized for floating-point operations to perform integer division, achieving speed improvement while managing precision through the conversion process.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8655937B1High precision integer division using low precision hardware operations and rounding techniques

Publication Date: 2014.02.18 NVIDIA CORP

AI summary

One or more embodiments of the invention set forth techniques to perform integer division using a floating point hardware unit supporting floating point variables of a certain bit size. The numerator and denominator are integers having a bit size that is greater than the bit size of the floating point variables supported by the floating point hardware unit. Error correcting techniques are utilized to account for any loss of precision caused by the floating point operations.