Integrated Assemblies with Voids for NAND Memory
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Solution Overview
Problem
Current NAND memory architectures face challenges in reducing capacitive coupling and cross-talk between conductive structures, which affects the performance and efficiency of memory operations.
Innovation Solution
The introduction of voids between conductive structures, formed through a method involving alternating layers of different materials and etching processes, to minimize capacitive coupling and enhance operational efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conductive structures are placed closer together to increase memory density, then storage capacity is improved, but capacitive coupling and cross-talk between structures increases
Solution Approach 1:
The patent introduces an intermediary material (dielectric or void) between adjacent conductive structures to reduce capacitive coupling. This intermediary element acts as a mediator that electrically isolates the conductive structures while allowing them to remain in close proximity, thereby maintaining high memory density without suffering from excessive cross-talk interference.
Solution Approach 2:
The patent applies different local properties to different regions of the memory structure. Specifically, certain regions between conductive structures are filled with dielectric material while other regions are left as voids, creating localized variations in electrical properties that optimize the balance between coupling reduction and signal integrity in different areas of the structure.
2Reliability
If alternating layers of different materials are deposited to form complex structures, then functional performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the memory structure into distinct alternating layers of different materials (e.g., first material and second material layers). Each layer performs a specific function, and the segmentation allows for modular fabrication processes where each layer can be deposited and processed independently, making the complex structure more manageable during manufacturing.
Solution Approach 2:
The patent employs preliminary actions in the fabrication process by first forming the alternating material layers and patterns before subsequent etching and filling steps. This preliminary structuring establishes a template that guides later processing steps, reducing the complexity of achieving the final three-dimensional pattern compared to attempting to form it in a single step.
Data Source
AI summary
Some embodiments include an integrated assembly having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include conductive structures. Channel material extends vertically through the stack. The conductive structures have proximal regions near the channel material, and have distal regions further from the channel material than the proximal regions. The insulative levels have first regions vertically between the proximal regions of neighboring conductive structures, and have second regions vertically between the distal regions of the neighboring conductive structures. Voids are within the insulative levels and extend across portions of the first and second regions. Some embodiments include methods for forming integrated assemblies.