Integrated Circuit Spare ECO Cell Coverage Using Density-Based DRC

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Solution Overview

Problem

Existing integrated circuit (IC) design processes lack efficient automated methods for validating the quantity and distribution of spare engineering change order (ECO) cells, which are crucial for post-fabrication logical design modifications, often relying on manual visual review and place-and-route scripting.

Innovation Solution

Implementing density-based Design Rule Checking (DRC) techniques to validate the minimum quantity and effective distribution of spare ECO cells using a computer-implemented method, creating a spare ECO cell checking layer and a standard cell placement area checking layer, and performing density-based DRC to ensure sufficient spare cell coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If manual visual review and place-and-route scripting are used to check spare ECO cell coverage, then the validation process can be performed, but the processing time is excessive and the automation level is low

Engineering Contradiction:
Improveautomation level of spare ECO cell validationVSAvoidprocessing time for validation
Core Design Contradiction:
Extent of automationVSLoss of time

Solution Approach 1:

The patent replaces manual visual review and traditional place-and-route scripting with an automated density-based Design Rule Checking (DRC) system. The system creates checking layers representing spare ECO cells and standard cell placement areas, then uses automated density calculations to validate coverage, substituting mechanical/manual processes with computational automation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional place and route environment scripting is used for checking spare ECO cell quantity, then basic validation can be achieved, but the distribution analysis remains manual and inefficient

Engineering Contradiction:
Improvevalidation efficiencyVSAvoidoperational complexity of validation process
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent segments the validation process into distinct checking layers: a spare ECO cell checking layer and a standard cell placement area checking layer. This segmentation allows automated density-based DRC to evaluate both quantity and distribution simultaneously, improving productivity while maintaining operational simplicity through structured layer-based analysis.

Inventive Principle:
Principle #1Segmentation

3Reliability

If sufficient spare ECO cells are distributed throughout the IC layout, then post-fabrication design modifications can be performed effectively, but ensuring adequate distribution requires complex manual review

Engineering Contradiction:
Improvereliability of post-fabrication design modificationsVSAvoidcomplexity of validation system
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the validation approach from qualitative manual review to quantitative density-based analysis. By defining density ratios of spare ECO cells relative to standard cell placement areas and comparing against threshold values, the system ensures reliable post-fabrication modification capability while maintaining manageable complexity through parameter-driven automated checking.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250258989A1Spare engineering change order cell coverage within integrated circuit designs
Publication Date: 2025.08.14 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250258989A1 patent drawing
  • US20250258989A1 patent drawing
  • US20250258989A1 patent drawing

AI summary

Embodiments of the present disclosure are directed to methods, systems, and computer program products for implementing spare ECO cell coverage validation within an IC) layout. A disclosed embodiment enables spare ECO cell coverage validation using density-based Design Rule Checking (DRC) techniques for validating both a minimum quantity and effective distribution of spare ECO cells in a given IC layout, effectively and efficiently providing ECO cell coverage verification, and accurately identifying failing spare ECO cell coverage. Disclosed embodiments automate the process of validating both a threshold or sufficient spare cell quantity and effective distribution of the spare ECO cells within an IC design layout.