Integrated Circuit Device With Subsurface Passive Elements
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Solution Overview
Problem
The integration of active and passive elements in semiconductor substrates is limited by the height and size constraints due to the need for connectors and surface-mounted passive elements, which hinders the miniaturization and high-density packaging of integrated circuit devices.
Innovation Solution
The integration of passive elements within grooves or holes in the semiconductor substrate, using a Si—O bond region formed by reacting Si particles with an organic Si compound, allows for high-density arrangement of active and passive elements without increasing the substrate thickness, enabling efficient electrical connection and high-density packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive elements are mounted with connectors (pads) on the surface of the semiconductor substrate, then electrical connection is achieved, but the height and size of the integrated circuit device increase
Solution Approach 1:
The patent transitions passive elements from surface mounting (2D plane) to subsurface embedding (3D volume). By forming grooves or holes within the semiconductor substrate and filling them with passive element structures, the design moves from utilizing only the surface area to utilizing the volumetric space within the substrate, thereby reducing surface footprint and overall device height while maintaining electrical connectivity through vertical conductive paths.
Solution Approach 2:
The patent embeds passive elements within the semiconductor substrate itself, creating a nested structure where passive components are contained inside the substrate volume. This nesting approach allows passive elements to coexist with active elements in the same vertical space, eliminating the need for separate surface mounting areas and reducing the overall device footprint and height.
2Ease of manufacture
If active elements are surface-mounted on a substrate, then ease of manufacture is improved, but the device thickness increases and high-density arrangement is limited
Solution Approach 1:
The patent merges the fabrication processes for active and passive elements into a single integrated workflow. Both element types are formed within the same semiconductor substrate using compatible fabrication techniques, eliminating the need for separate substrate preparations and reducing the overall device thickness. The active and passive elements share the same vertical space, allowing for high-density integration without increasing device thickness.
3Ease of manufacture
If passive elements are arranged on the semiconductor substrate surface, then ease of manufacture is maintained, but high-density arrangement cannot be achieved
Solution Approach 1:
The patent exploits the third dimension (depth) within the semiconductor substrate to increase element density. By forming grooves or holes that extend vertically into the substrate and filling them with passive element structures, the design transforms a 2D surface arrangement into a 3D volumetric arrangement. This enables significantly higher element density as passive elements are distributed throughout the substrate volume rather than confined to the surface plane.
Solution Approach 2:
The patent utilizes a porous or cavity-based structure within the semiconductor substrate to accommodate passive elements. By creating a network of grooves, holes, or porous regions within the substrate and filling them with functional materials, the design increases the effective volume available for passive elements without increasing the external device dimensions, thereby achieving high-density integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of thin integrated circuit devices with high-density active and passive element arrangements, suitable for TSV technology, reducing size and power consumption while maintaining efficient electrical connectivity.
Implementation Method 1
The functional element has a Si—O bond region obtained by reacting Si particles with an organic Si compound
Data Source
AI summary
An integrated circuit device includes a semiconductor substrate, an active element and a passive element. The active element is made of the semiconductor substrate. The passive element includes a functional element filled in a groove or hole provided in the semiconductor substrate along a thickness direction thereof and is electrically connected to the active element. The functional element has a Si—O bond region obtained by reacting Si particles with an organic Si compound.