Integrated Circuit Trench MIS Diode for Stable Resistive States
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving stable and distinguishable resistive states for memory operations due to insufficient charge trapping sites and limited current windows, which affect memory performance.
Innovation Solution
The design of metal-insulator-semiconductor (MIS) tunneling diodes with edge trench structures enhances charge trapping sites by incorporating a trench-type configuration and a passivation layer, which enlarges the memory window and improves current differentiation between resistive states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional semiconductor device structures are used, then manufacturing process is simple, but charge trapping sites are insufficient and current window is limited
Solution Approach 1:
The patent transitions from a planar device structure to a three-dimensional trench-type structure. The trench extends vertically into the semiconductor substrate, creating additional spatial dimensions for charge trapping. This dimensional change increases the surface area and volume available for charge trapping sites without merely scaling up the planar dimensions, thereby resolving the contradiction between increasing charge trapping sites and maintaining manageable device complexity.
Solution Approach 2:
The patent implements a nested structure where the trench-type memory device is embedded within the semiconductor substrate. The trench structure contains multiple functional layers (tunneling layer, blocking layer, electrode layers) nested within each other vertically. This nesting approach maximizes the use of vertical space for charge trapping while maintaining a compact overall device footprint, addressing the contradiction between increasing charge trapping capacity and controlling device complexity.
2Manufacturing precision
If conventional structures are used, then device fabrication is straightforward, but memory window is limited and current differentiation is poor
Solution Approach 1:
The patent applies different material properties and structural characteristics to specific regions of the device. The trench structure creates localized regions with enhanced electric field distribution, while different layers (tunneling layer, blocking layer) have distinct material properties optimized for their specific functions. This local quality differentiation enables precise control over charge trapping and current differentiation, improving manufacturing precision for current window enlargement while managing fabrication complexity through targeted regional optimization.
Solution Approach 2:
The patent utilizes parameter changes in the trench structure, including varying trench depth, width, and aspect ratio, along with adjusting layer thicknesses and material compositions. These parameter optimizations are specifically tuned to maximize the current window and improve current differentiation between programmed and erased states. By systematically adjusting these parameters, the patent achieves enhanced manufacturing precision for memory performance while providing guidance for fabrication process development.
3Reliability
If simple structures are used, then manufacturing is easier, but resistive states are not stable and distinguishable
Solution Approach 1:
The patent incorporates preliminary actions in the device design, including pre-formed trench structures, pre-deposited tunneling and blocking layers, and pre-patterned electrodes. These preliminary structural elements are prepared in advance to ensure stable charge trapping sites before actual memory operations. The pre-configured trench-type structure provides a stable framework that enhances resistive state reliability, while the preliminary preparation of functional layers ensures proper charge confinement and state differentiation, addressing the contradiction between reliability and device complexity.
Solution Approach 2:
The patent employs composite material structures within the trench, combining different dielectric materials (tunneling layer and blocking layer) with distinct electrical properties. This composite structure creates well-defined energy barriers and trapping sites that enhance the stability and distinguishability of resistive states. The combination of multiple materials with complementary properties provides robust charge confinement mechanisms, improving reliability while the systematic integration of these materials manages the complexity of the trench-type structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The trench-type MIS TD devices exhibit a stable and enlarged current window, enabling better distinction between high and low resistive states, thereby enhancing memory performance and operational stability.
Implementation Method 1
Metal-insulator-semiconductor (MIS) tunneling diode devices
Implementation Method 2
incorporating a trench-type configuration and a passivation layer that traps charges at trench edges
Data Source
AI summary
An integrated circuit device includes a semiconductor structure, a tunneling layer, a top electrode, a passivation layer, and a conductive feature. The semiconductor structure has a base portion and a protruding portion over a top surface of the base portion. The tunneling layer is over a top surface of the protruding portion of the semiconductor structure. The top electrode is over the tunneling layer. The passivation layer is over a sidewall of the protruding portion of the semiconductor structure. The conductive feature is directly below the protruding portion of the semiconductor structure.