Integrated Computing Structures on Silicon Using Shared Materials
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Solution Overview
Problem
The integration of electronic circuits and memory devices on a single silicon substrate faces challenges in achieving effective isolation between memory cells, which affects the density and functionality of integrated computing structures, particularly in metal-oxide-semiconductor technology.
Innovation Solution
The use of shallow trench isolation (STI) and deep trench isolation (DTI) techniques, combined with shared materials for CMOS and NVM devices, provides effective isolation and reduces complexity by utilizing common materials for multiple functions within the integrated computing structure, such as tungsten for metal gates and tantalum nitride for interface stabilizing materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) and deep trench isolation (DTI) techniques are used to isolate memory cells, then isolation effectiveness is improved, but device complexity increases
Solution Approach 1:
The isolation structure is divided into two distinct segments: shallow trench isolation (STI) for isolating memory cells from each other, and deep trench isolation (DTI) for isolating logic circuitry from memory cells. This segmentation allows each isolation technique to be optimized for its specific function, improving overall isolation effectiveness while maintaining manageable complexity through modular design.
2Reliability
If different materials are used for CMOS and NVM devices, then device performance is optimized, but manufacturing complexity increases
Solution Approach 1:
Tungsten is used as a universal material serving multiple functions: as metal gates for both CMOS and NVM devices, and as fill material for both STI and DTI structures. This multi-functionality reduces the number of different materials that must be deposited and processed, significantly simplifying manufacturing while maintaining optimized device performance through appropriate material selection for each application.
Solution Approach 2:
The gate material and STI/DTI fill material are merged into a single material system (tungsten), eliminating the need for separate material deposition processes. This consolidation reduces manufacturing steps and complexity while allowing the tungsten to be engineered with appropriate properties for both gate and isolation functions.
3Productivity
If more memory cells are integrated on a single substrate, then computing density is improved, but isolation challenges worsen
Solution Approach 1:
Different isolation depths and configurations are applied locally based on specific needs: STI is used where moderate isolation is sufficient (between adjacent memory cells), while DTI is used where deeper isolation is required (between logic and memory regions). This local differentiation allows high-density integration while maintaining appropriate isolation effectiveness in each specific location.
Data Source
AI summary
The present disclosure includes methods of forming, and semiconductor structures for, integrated computing structures formed on silicon. An example method includes forming, on a silicon semiconductor material, an integrated computing structure by forming a number of complementary metal-oxide-semiconductor (CMOS) devices including a plurality of materials, forming a non-volatile memory (NVM) device including a plurality of materials, and forming the plurality of materials of the CMOS devices and the plurality of materials of the NVM device from a plurality of same materials shared at a corresponding plurality of positions within the structure. A particular function is provided by each of the plurality of same materials at the corresponding plurality of positions.