Integrated Display Panel Test Circuit Reducing Dead Space

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Solution Overview

Problem

Conventional display panel test circuits occupy significant space in display devices due to their individual configurations, leading to increased bezel width and dead space, as they perform pre-lighting, lighting, open-short, and crack tests independently.

Innovation Solution

Integration of at least two test circuits, including pre-lighting, lighting, open-short, and crack test circuits, within a single display panel test circuit, reducing the number of transistors and space required, while maintaining functionality across various tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If test circuits are configured individually and independently, then each test function can be performed separately, but the dead space of the display panel increases

Engineering Contradiction:
Improvetest function independenceVSAvoiddead space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple independent test circuits (pre-lighting test circuit, lighting test circuit, open-short test circuit, and crack test circuit) into a single integrated test circuit. This merging reduces the total area occupied by test circuits in the non-display region while maintaining all individual test functions through shared transistor resources that are activated based on different test signals.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated test circuit employs transistors that can serve multiple test functions. The same transistors are used across different test circuits, and their functionality is determined by the specific test signal applied. This multi-functionality allows a reduced number of transistors to perform all required tests, thereby reducing dead space while preserving test capability versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If multiple test circuits are integrated into a single circuit, then the dead space is reduced, but the circuit complexity increases

Engineering Contradiction:
Improvedead spaceVSAvoidcircuit structure
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The integrated test circuit uses dynamically controllable transistors whose function changes based on the applied test signal. Different gate signals activate different transistor configurations, allowing the same physical circuit to perform multiple test functions at different times. This dynamic reconfiguration reduces structural complexity compared to having separate dedicated circuits for each test function.

Inventive Principle:
Principle #15Dynamics

3Area of stationary object

If the number of transistors is reduced through integration, then the space requirement decreases, but the difficulty of detecting and measuring test functions increases

Engineering Contradiction:
Improvespace requirementVSAvoidtest function detection
Core Design Contradiction:
Area of stationary objectVSDifficulty of detecting and measuring

Solution Approach 1:

While integrating circuits, the patent maintains functional segmentation by using distinct test signals for different test functions. Each test signal type (pre-lighting signal, lighting signal, open-short signal, crack signal) selectively activates specific transistor configurations, allowing independent detection and measurement of each test function despite the shared physical circuitry. This signal-based segmentation simplifies test function detection compared to a fully monolithic design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11493552B2Display panel test circuit
Publication Date: 2022.11.08 SAMSUNG DISPLAY CO LTD
  • US11493552B2 patent drawing
  • US11493552B2 patent drawing
  • US11493552B2 patent drawing

AI summary

A display panel test circuit includes a first transistor connected to a first data line and receiving a red lighting test signal, a second transistor connected to the first data line and receiving a blue lighting test signal, a third transistor connected to a second data line and receiving a first green lighting test signal, a fourth transistor connected to a third data line and receiving the red lighting test signal, a fifth transistor connected to the third data line and receiving the blue lighting test signal, a sixth transistor connected to a fourth data line and receiving a second green lighting test signal, a seventh transistor connected to the second data line and receiving a crack test signal, and an eighth transistor connected to the fourth data line and receiving the crack test signal. The display panel test circuit performs one or more tests on a display panel.