Integrated ESD Clamp Layout for Backside Power Rails
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Solution Overview
Problem
Current semiconductor technologies face challenges in effectively managing electrostatic discharge (ESD) across power supply rails, particularly in advanced CMOS and other semiconductor fabrication technologies.
Innovation Solution
The integration of an RC-based power rail ESD clamp circuit, which includes a resistor-capacitor circuit with the capacitor located on the frontside and the resistor in the backside power delivery network, along with a control circuit and an electrostatic discharge clamp device, such as a wide nanosheet transistor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional planar FET structures are used, then manufacturing is simpler, but device area is larger and ESD protection is insufficient
Solution Approach 1:
The patent merges the ESD clamp circuit with the core circuit by sharing the power delivery network infrastructure. The RC circuit is integrated into the existing power delivery structure, with the capacitor connected to frontside power rails and the resistor connected to backside power rails, eliminating the need for separate ESD protection circuits and reducing overall device complexity while improving ESD protection capability
Solution Approach 2:
The patent utilizes the third dimension by implementing a three-dimensional power delivery network with power rails extending through the substrate thickness. The capacitor is positioned on the frontside while the resistor is positioned on the backside, creating a vertical RC circuit path that effectively protects against ESD events without increasing lateral device area
2Area of stationary object
If FET size is reduced for miniaturization, then chip area decreases, but ESD protection capability deteriorates
Solution Approach 1:
The patent transitions from two-dimensional planar ESD protection to three-dimensional protection by utilizing vertical power delivery paths through the substrate. The RC circuit extends in the thickness direction with the capacitor on the frontside and resistor on the backside, providing effective ESD protection for miniaturized devices without requiring increased lateral area
Solution Approach 2:
The patent segments the ESD protection function into distributed RC circuits integrated throughout the power delivery network. Multiple capacitors and resistors are distributed across the frontside and backside respectively, providing localized ESD protection at multiple points throughout the device rather than relying on a single centralized protection circuit
3Productivity
If stacked transistor structures are used, then device density increases, but via aspect ratio increases making fabrication more difficult
Solution Approach 1:
The patent segments the power delivery network into frontside and backside components, with capacitors formed on the frontside and resistors formed on the backside. This segmentation allows the RC circuit to be built using separate fabrication processes for each side, avoiding the need to form high aspect ratio vias through the entire substrate thickness while maintaining stacked transistor structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides improved ESD capability under ESD stress conditions by effectively discharging ESD events through the ESD power supply clamp, thereby protecting the circuit core.
Implementation Method 1
a capacitor at the first side of the semiconductor structure. A first electrode of the capacitor is coupled to a first power rail in the power delivery network at the second side of the semiconductor structure. A second electrode of the capacitor is coupled to a second power rail in the power delivery network at the second side of the semiconductor structure
Implementation Method 2
a resistor in a power delivery network at a second side of the semiconductor structure... An input of the control circuit is coupled to the resistor
Data Source
AI summary
A semiconductor structure includes a transistor device at a first side of the semiconductor structure, a control circuit at the first side of the semiconductor structure, and a resistor-capacitor circuit including a resistor and a capacitor. The resistor is in a power delivery network at a second side of the semiconductor structure and the capacitor is at the first side of the semiconductor structure. A first electrode of the capacitor is coupled to a first power rail in the power delivery network at the second side of the semiconductor structure. A second electrode of the capacitor is coupled to a second power rail in the power delivery network at the second side of the semiconductor structure. An input of the control circuit is coupled to the resistor. A gate of the transistor device is coupled to an output of the control circuit.