Integrated ETSM Topology for Wideband RF PA Linearity
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Solution Overview
Problem
Conventional envelope tracking supply modulator (ETSM) architectures face performance and efficiency degradation due to parasitic inductance on printed circuit boards (PCBs) and capacitor loads, especially at high bandwidths exceeding 100 MHz, which affects the linearity of the power amplifier.
Innovation Solution
The proposed ETSM topology integrates a linear amplifier within the same chip as the power amplifier, generating an envelope tracking supply voltage internally to avoid inductive peaking from PCB parasitic inductance, using a PMIC to provide a DC supply voltage combined with an amplified envelope tracking signal for efficient amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the ETSM uses a conventional architecture with external PMIC and PCB traces, then the device complexity is reduced and ease of manufacture is improved, but parasitic inductance causes inductive peaking that degrades linearity and performance
Solution Approach 1:
The patent merges the linear amplifier and power amplifier onto a single chip, integrating the envelope tracking signal generation and power amplification functions. This integration eliminates the need for external PCB traces and separate PMIC components, thereby removing the parasitic inductance that causes inductive peaking and degrades linearity.
Solution Approach 2:
The patent extracts the linear amplifier function from the external PMIC and integrates it directly with the power amplifier on the same chip. This extraction of the envelope tracking signal path from the external PCB environment eliminates the parasitic inductance source while maintaining the envelope tracking functionality.
2Adaptability or versatility
If the envelope tracking bandwidth is increased to exceed 100 MHz for wide-bandwidth applications, then the adaptability and performance range are improved, but the parasitic inductance effects are amplified causing greater performance degradation
Solution Approach 1:
By merging the linear amplifier and power amplifier on a single chip, the patent enables wide-bandwidth operation (exceeding 100 MHz) without the parasitic inductance limitations of conventional external architectures. The integrated design maintains performance reliability across the extended bandwidth range.
3Reliability
If the ETSM is integrated onto a single chip, then parasitic inductance is reduced and linearity is improved, but manufacturing complexity and device integration difficulty increase
Solution Approach 1:
The patent combines multiple amplifier functions on a single chip using integrated circuit fabrication techniques. This merging approach achieves the linearity improvements from reduced parasitic inductance while utilizing standard semiconductor manufacturing processes to manage the manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the linearity and performance of the power amplifier by eliminating inductive peaking, thereby improving the overall efficiency and output quality of the ETSM.
Implementation Method 1
the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal
Implementation Method 2
the power amplifier is configured to receive an input signal to generate an output signal
Data Source
AI summary
A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.