Integrated Gate Contact Structure for Semiconductor Reliability
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Solution Overview
Problem
The increasing aspect ratio and reduced contact-poly-pitch in 3D-stacked semiconductor devices lead to challenges in improving yield due to short-circuit risks and capacitance increases between gate contact structures and other circuit elements.
Innovation Solution
A gate contact structure is formed as a portion of the gate structure itself, eliminating the need for a separate connection surface or interface, and featuring a protrusion or pillar on the top surface of the gate structure to receive a gate input signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate gate contact structure is formed on the gate structure, then the gate input signal can be received, but the risk of short-circuit and capacitance increase between gate contact structure and other circuit elements increases
Solution Approach 1:
The gate contact structure is merged with the gate structure by forming the gate contact structure as an integral part of the gate structure, eliminating the interface between them. This merging removes the separate gate contact structure that could cause short-circuits and reduces capacitance while maintaining the ability to receive gate input signals.
2Productivity
If the aspect ratio is increased for higher device density, then more transistors can be stacked, but the short-circuit risk and capacitance increase between gate contact structure and other circuit elements worsens
Solution Approach 1:
By merging the gate contact structure with the gate structure into a single integrated structure, the invention eliminates the separate components that could cause short-circuits in high aspect ratio configurations. This allows higher device density through increased stacking while maintaining reliability.
3Use of energy by moving object
If a separate gate contact structure is used, then the gate input signal can be received, but the capacitance between gate contact structure and source/drain contact structure increases
Solution Approach 1:
The gate contact structure is merged with the gate structure to form a single integrated structure, eliminating the separate gate contact structure that creates parasitic capacitance with source/drain contact structures. This reduces capacitance while maintaining the ability to receive gate input signals.
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
Provided is a semiconductor device (20) which may include: a channel structure (110, 120); a gate structure (125) on the channel structure (110, 120); and a gate contact structure (CB2) on the gate structure (125), the gate contact structure (CB2) configured to receive a gate input signal, wherein the gate contact structure (CB2) is a portion of the gate structure (125) itself, and no connection surface, interface or boundary is formed between the gate contact structure (CB2) and the gate structure (125).