Integrated Impedance Measurement Device for SoC Characterization
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Solution Overview
Problem
Current impedance measurement techniques for integrated circuits require external probing and multiple measurements, which are time-consuming and inefficient, especially for characterizing the performance of multiple devices under test within a System on Chip (SoC).
Innovation Solution
An integrated impedance measurement device is embedded within the SoC, comprising measurement circuits, a controller, and a Fast Fourier Transform (FFT) processor, which generates clock signals, detects voltages, and calculates impedances using electrical parameters, allowing for internal characterization and minimizing the need for external testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external probing and multiple measurements are used for impedance characterization, then measurement accuracy can be achieved, but testing time increases significantly
Solution Approach 1:
The patent combines multiple measurement functions (impedance measurement, voltage measurement, current measurement) into a single integrated measurement device embedded within the SoC. This consolidation enables simultaneous acquisition of multiple electrical parameters through unified measurement circuits, eliminating the need for sequential external probing and multiple separate measurement devices, thereby reducing testing time while maintaining measurement accuracy.
Solution Approach 2:
The measurement device is embedded within the SoC itself, enabling the system to perform self-diagnosis and self-characterization. The integrated device can autonomously measure impedance, voltage, and current of internal circuits without requiring external testing equipment, thereby eliminating time-consuming external probing while maintaining measurement precision through dedicated measurement circuits.
2Adaptability or versatility
If multiple separate measurement devices are used for impedance characterization, then comprehensive electrical parameter measurement is achieved, but device complexity and testing overhead increase
Solution Approach 1:
The integrated measurement device performs multiple measurement functions (impedance, voltage, current) through a unified architecture. The measurement circuits can selectively measure different electrical parameters by configuring the same physical resources (ADCs, measurement nodes), thereby achieving comprehensive measurement capability without requiring separate dedicated devices for each parameter, thus reducing device complexity and testing overhead.
Solution Approach 2:
The patent merges impedance measurement, voltage measurement, and current measurement functions into a single integrated device with shared measurement circuits and control logic. This consolidation reduces the number of separate testing devices and interfaces required, thereby reducing device complexity and testing overhead while maintaining the ability to measure all necessary electrical parameters.
3Measurement precision
If external probing is used for impedance measurement, then measurement capability is maintained, but chip area overhead and testing efficiency decrease
Solution Approach 1:
The measurement device is embedded within the SoC, enabling internal circuits to be measured without external probing. The integrated device uses on-chip measurement circuits and ADCs to directly characterize impedance, voltage, and current of internal blocks, thereby eliminating the need for external probing infrastructure and reducing chip area overhead while maintaining measurement precision through dedicated on-chip measurement resources.
Solution Approach 2:
The measurement device is nested within the SoC architecture, with measurement circuits integrated alongside the functional blocks being measured. This nesting allows the measurement device to access internal nodes and signals directly without requiring external probing, thereby reducing chip area overhead while maintaining impedance measurement capability through on-chip measurement resources.
Data Source
AI summary
Systems, devices, and methods are described herein for measuring an impedance of a DUT using an integrated impedance measurement device. A system includes a plurality of measurement circuits, a FFT processor, and a controller. The measurement circuits are coupled to the DUTs. Each measurement circuit is configured to generate a clock signal for a respective DUT, detect a voltage of the respective DUT, and generate first voltage related data using the clock signal and the voltage. The FFT processor is coupled to the measurement circuits. The FFT processor is configured to convert the first voltage related data into second voltage related data using a fast Fourier transform for each measurement circuit. The controller is coupled to the measurement circuits and the FFT processor. The controller is configured to calculate an impedance using the second voltage related data for each measurement circuit and output the impedance to each DUT.