Integrated Volatile-Nonvolatile Memory Bitcells for Fast Data Retention
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Solution Overview
Problem
Current non-volatile memory technologies face challenges in scalability, endurance, and power efficiency, particularly below 65 nanometers, with existing flash memory technologies not easily scalable and newer resistance-based memories exhibiting instability and fatigue issues.
Innovation Solution
Integration of volatile and non-volatile magnetic memory elements within bitcells, allowing individual access and maintaining signal states across power cycles, reduces power consumption and latency by copying memory states between volatile and non-volatile devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flash memory technology is used to achieve non-volatile storage, then storage capacity and bit density are improved, but scalability below 65 nanometers deteriorates
Solution Approach 1:
The patent segments the memory system into two distinct types of bitcells: volatile memory bitcells (for fast access) and non-volatile memory bitcells (for data retention). This segmentation allows each type to be optimized independently for its specific function while working together as an integrated system, resolving the contradiction between achieving high storage capacity and maintaining scalability to smaller process nodes.
2Adaptability or versatility
If resistance-based memory devices are used to achieve non-volatile storage, then scalability is improved, but stability and reliability deteriorate due to fatigue issues
Solution Approach 1:
The patent merges volatile and non-volatile memory bitcells into a single integrated memory device with shared circuitry. This combination allows the system to achieve both scalability (through the non-volatile bitcells) and reliability (through the stable volatile bitcells), as each type compensates for the other's weaknesses while working together in a unified architecture.
3Duration of action of stationary object
If only non-volatile memory is used, then data retention is improved, but power consumption and access latency increase
Solution Approach 1:
The patent implements a mechanism where non-volatile memory bitcells pre-store data that can be quickly transferred to volatile memory bitcells when needed. This preliminary action in the non-volatile memory allows the system to maintain data retention while enabling fast access through the volatile memory, thereby reducing both power consumption and access latency compared to using only non-volatile memory.
4Speed
If volatile memory is used for fast access, then access speed is improved, but data retention deteriorates
Solution Approach 1:
The patent uses non-volatile memory bitcells as an intermediary between persistent storage and volatile memory. The non-volatile bitcells maintain data retention while enabling fast transfer to volatile bitcells for quick access. This intermediary role resolves the contradiction by allowing data to be quickly accessed through the volatile memory while the non-volatile memory ensures data retention, creating a unified system that achieves both fast access and data persistence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This integration enhances memory performance by reducing power consumption and latency while maintaining signal integrity across power cycles, enabling more efficient and scalable memory solutions.
Implementation Method 1
one or more non-volatile magnetic memory elements electrically coupled to a first node of the one or more volatile memory elements
Data Source
AI summary
Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate transfer of stored values between the volatile and non-volatile memory bitcells.