Integrated Memory Cell Layout for Single-Read Multi-State Access

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Solution Overview

Problem

Flash memory cells require multiple read operations to access multi-state memory, leading to longer read times, whereas embedded nonvolatile memory cells offer random access but with higher fabrication costs and power consumption.

Innovation Solution

An integrated memory cell combining a flash memory cell and an embedded nonvolatile memory cell, where the embedded cell is formed on either side of the flash memory cell, allowing for serial coupling and independent programming and erasing operations, thereby reducing read time to one operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If flash memory cells are used for multi-state storage, then storage capacity is improved, but read time increases due to multiple read operations

Engineering Contradiction:
Improvestorage capacityVSAvoidread time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent merges flash memory cell and embedded NVM cell into a single integrated memory cell structure. The flash memory cell provides multi-state storage capacity while the embedded NVM cell enables single-operation random access, resolving the contradiction between storage capacity and read time by combining the strengths of both memory types in one cell

Inventive Principle:
Principle #5Merging (Combining)

2Loss of time

If embedded NVM cells are used for random access, then read time is reduced, but fabrication cost and power consumption increase

Engineering Contradiction:
Improveread timeVSAvoidfabrication cost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The integrated memory cell combines flash memory cell and embedded NVM cell where the flash portion handles multi-state storage at lower cost, while the embedded NVM portion provides fast random access. This merging allows the system to achieve fast read times without paying the full fabrication cost penalty of pure embedded NVM

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated memory cell serves multiple functions: it provides multi-state storage capacity through the flash portion while simultaneously enabling single-operation random access through the embedded NVM portion. This multi-functionality allows one cell structure to deliver both high storage capacity and fast access without requiring separate memory devices

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of time

If embedded NVM cells are used for random access, then read time is reduced, but power consumption increases

Engineering Contradiction:
Improveread timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent merges flash memory cell and embedded NVM cell into a single integrated memory cell structure. The flash memory cell provides multi-state storage capacity while the embedded NVM cell enables single-operation random access, resolving the contradiction between storage capacity and read time by combining the strengths of both memory types in one cell

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12069857B2Memory cell, memory device manufacturing method and memory device operation method thereof
Publication Date: 2024.08.20 MACRONIX INTERNATIONAL CO LTD
  • US12069857B2 patent drawing
  • US12069857B2 patent drawing
  • US12069857B2 patent drawing

AI summary

The application discloses an integrated memory device, a manufacturing method and an operation method thereof. The integrated memory cell includes: a first memory cell; and an embedded second memory cell, serially coupled to the first memory cell, wherein the embedded second memory cell is formed on any one of a first side and a second side of the first memory cell.