Integrated Metrology Target for Semiconductor Film and Overlay Measurement
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Solution Overview
Problem
Existing methods for film and critical dimension metrology in semiconductor devices are inefficient, requiring large scribe space, long measurement times, and limited modeling performance due to independent metrology of film, critical dimensions, and overlay on different targets without common data sampling.
Innovation Solution
Implementing a novel target design that uses feed-forward and feed-sideways scenarios with measurement cell reuse, allowing for integrated metrology before lithography, interpolation of film properties, and combination of differential measurements and modeling to enhance parameter sensitivity and reduce unnecessary parameter sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If independent metrology of film, CD, and overlay on different targets is used, then measurement coverage is comprehensive, but scribe space occupation is large and measurement time is long
Solution Approach 1:
The patent combines film metrology, critical dimension (CD) metrology, and overlay metrology into a single integrated target structure. This merging allows all three types of measurements to be performed on one target rather than requiring separate targets, thereby reducing the number of measurement steps and decreasing total measurement time while maintaining comprehensive measurement coverage.
Solution Approach 2:
The integrated target is designed to serve multiple metrology functions simultaneously. It includes structures that enable film thickness measurement, CD measurement, and overlay measurement all in one target, making it a universal metrology solution that replaces multiple specialized targets and reduces scribe space occupation.
2Measurement precision
If independent metrology of film, CD, and overlay on different targets is used, then measurement coverage is comprehensive, but scribe space occupation is large
Solution Approach 1:
The patent merges film, CD, and overlay metrology structures into a single integrated target, consolidating what would traditionally require multiple separate targets. This integration dramatically reduces the total scribe space occupation while maintaining the ability to perform all three types of measurements.
Solution Approach 2:
The integrated target serves as a universal structure that provides multiple metrology capabilities within a compact footprint. By designing one target that can perform film thickness measurement, CD measurement, and overlay measurement, the patent reduces the area required on the scribe line compared to using separate specialized targets.
3Measurement precision
If independent metrology of film, CD, and overlay on different targets is used, then each measurement can be specialized, but modeling performance is limited due to floating multiple parameters
Solution Approach 1:
The patent combines multiple metrology measurements into a single integrated target that allows simultaneous or sequential measurement of film thickness, CD, and overlay. This integration enables the use of common reference structures and measurement conditions across all three measurement types, improving modeling performance by reducing the number of independent parameters that need to be floated and calibrated.
Solution Approach 2:
The integrated target design changes the measurement parameters by providing common reference features and measurement conditions for all three metrology types. This allows for better parameter correlation and reduced uncertainty in the modeling process, as measurements are taken under consistent conditions rather than requiring separate calibration for each measurement type.
4Ease of operation
If traditional metrology methods are used, then setup procedures are straightforward, but setup time and metrology time are long
Solution Approach 1:
The integrated target is designed in advance with all necessary measurement structures (film thickness references, CD structures, overlay markers) pre-configured in a single target. This preliminary design eliminates the need for multiple setup procedures and target changes during measurement, thereby reducing setup time while maintaining ease of operation through a unified measurement approach.
Data Source
AI summary
Metrology may be implemented during semiconductor device fabrication by a) modeling a first measurement on a first test cell formed in a layer of a partially fabricated device; b) performing a second measurement on a second test cell in the layer; c) feeding information from the second measurement into the modeling of the first measurement; and after a lithography pattern has been formed on the layer including the first and second test cells, d) modeling a third and a fourth measurement on the first and second test cells respectively using information from a) and b) respectively.