3D Integrated Passive Substrate for Compact RF Front-End Matching

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Solution Overview

Problem

Conventional mobile phones face challenges with discrete radio frequency components that are bulky, consume high power, and have inconsistent parasitic parameters, making it difficult to meet the demands of miniaturization, multiple signal frequency bands, and longer battery life.

Innovation Solution

A base plate integrating passive devices, including inductors and capacitors, is designed with open ring portions connected through via holes and interlayer dielectric layers, allowing for compact integration and reduced size, while also incorporating a method for manufacturing these components using a seed layer, sacrificial layer, and electroplating processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If discrete components are used on radio frequency PCB, then ease of manufacture is improved, but device volume and power consumption increase

Engineering Contradiction:
Improveease of manufactureVSAvoiddevice volume
Core Design Contradiction:
Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent merges multiple discrete passive components (inductors, capacitors, resistors) into a single integrated passive device structure. The inductor uses stacked ring portions connected by vias, and the capacitor uses stacked polar plates, both integrating multiple functions in one compact unit that replaces multiple separate components on the PCB.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar 2D component layouts to 3D vertical stacking. Multiple ring portions are stacked in the vertical direction and connected through vias to form inductors, while capacitor plates are similarly stacked. This vertical integration dramatically reduces the horizontal footprint and overall device volume.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If discrete components are used on radio frequency PCB, then ease of manufacture is improved, but power consumption increases

Engineering Contradiction:
Improveease of manufactureVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent merges multiple discrete passive components (inductors, capacitors, resistors) into a single integrated passive device structure. The inductor uses stacked ring portions connected by vias, and the capacitor uses stacked polar plates, both integrating multiple functions in one compact unit that replaces multiple separate components on the PCB.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar 2D component layouts to 3D vertical stacking. Multiple ring portions are stacked in the vertical direction and connected through vias to form inductors, while capacitor plates are similarly stacked. This vertical integration dramatically reduces the horizontal footprint and overall device volume.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If discrete components are used on radio frequency PCB, then ease of manufacture is improved, but parasitic parameter consistency deteriorates

Engineering Contradiction:
Improveease of manufactureVSAvoidparasitic parameter consistency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges multiple discrete passive components (inductors, capacitors, resistors) into a single integrated passive device structure. The inductor uses stacked ring portions connected by vias, and the capacitor uses stacked polar plates, both integrating multiple functions in one compact unit that replaces multiple separate components on the PCB.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an interlayer dielectric layer as an intermediary between the stacked conductive elements. This dielectric layer provides controlled impedance and consistent electrical characteristics, ensuring reliable parasitic parameters for the integrated passive devices while facilitating the vertical stacking architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a compact, high-performance, and consistent integration of passive devices, reducing size and power consumption, and improving interconnection and matching between radio frequency chips, thus addressing the limitations of discrete components.

Implementation Method 1

electroplating the seed layer so that metal materials are formed at the slot portions

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 2

an interlayer dielectric layer is disposed between the open ring portions disposed adjacently, and the open ring portions disposed adjacently are electrically connected through a first via hole penetrating the interlayer dielectric layer

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS20240079354A1Substrate integrated with passive device, and production method therefor
Publication Date: 2024.03.07 BOE TECHNOLOGY GROUP CO LTD
  • US20240079354A1 patent drawing
  • US20240079354A1 patent drawing
  • US20240079354A1 patent drawing

AI summary

The present disclosure provides a base plate integrating passive devices and a method for manufacturing the same, which relate to the technical field of radio frequency devices. The base plate integrating passive devices of the present disclosure includes a substrate base plate and the passive devices disposed on the substrate base plate, the passive devices including at least an inductor, the inductor including a plurality of open ring portions arranged and connected in sequence in a direction away from the base plate, wherein an interlayer dielectric layer is disposed between the open ring portions disposed adjacently, and the open ring portions disposed adjacently are electrically connected through a first via hole penetrating the interlayer dielectric layer; orthographic projections of any two of the open ring portions on the substrate base plate at least partially overlap.