Integrated Semiconductor Variable Resistor with Trench Structure
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Solution Overview
Problem
Conventional semiconductor integrated circuits require external variable resistors, making the manufacturing process inconvenient.
Innovation Solution
A semiconductor variable resistor device is integrated into the semiconductor circuit, comprising a substrate, gate, doped regions, and lightly doped drain regions, with a trench structure that allows for control of resistance by adjusting voltages, enabling the device to be formed within the circuit itself.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an external variable resistor is used in the semiconductor integrated circuit, then the resistance control function is achieved, but the manufacturing convenience deteriorates due to the need for external components and electrical pads
Solution Approach 1:
The patent merges the variable resistor function with the existing CMOS transistor structure by integrating the trench formation, lightly doped drain regions, and doped source/drain regions directly into the semiconductor circuit substrate. This eliminates the need for external variable resistors and electrical pads, thereby improving manufacturing convenience while maintaining the resistance control function through the gate electrode.
2Device complexity
If the variable resistor is integrated into the semiconductor circuit, then the manufacturing convenience is improved, but the device structure becomes more complex
Solution Approach 1:
The patent segments the transistor structure into distinct regions including the trench, lightly doped drain regions, and doped source/drain regions. This segmentation allows for controlled resistance characteristics while using standard CMOS fabrication processes, thereby managing process complexity while achieving integration.
Solution Approach 2:
The patent applies local quality by creating specific doped regions with different doping concentrations and depths at different locations within the transistor structure. The lightly doped drain regions and doped source/drain regions have tailored properties to achieve the desired resistance range (56k to 544k ohms) while maintaining compatibility with existing CMOS processes.
3Manufacturing precision
If the trench depth is increased to improve resistance control, then the resistance precision is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by forming the trench and lightly doped drain regions before forming the doped source/drain regions. This sequential approach allows for better control of the final resistance characteristics while using standard fabrication processes, thereby achieving manufacturing precision without excessive fabrication difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This integration allows for convenient manufacturing and effective resistance control within the semiconductor circuit, with resistance ranging from 56k to 544k ohms, compatible with existing CMOS transistor processes.
Implementation Method 1
a gate electrode (110) disposed on the semiconductor substrate (100) and having a gate length (L); two source/drain regions (150A, 150B) respectively disposed on two sides of the gate electrode (110) and having a doping concentration of 1×10^19 to 1×10^21 atoms/cm³
Implementation Method 2
two lightly doped drain regions (140A, 140B) respectively disposed between the gate electrode (110) and the source/drain regions (150A, 150B) and having a doping concentration of 1×10^17 to 1×10^19 atoms/cm³
Data Source
AI summary
A semiconductor variable resistance device includes: a substrate; a gate formed on the substrate, the substrate further including a first trench the first trench formed outside a side of the gate; first and second doped regions, formed in the substrate, the first and second doped regions formed on two sides of the gate, the first trench formed between the gate and the first doped region; and first and second lightly-doped drain (LDD) regions, formed in the substrate. The first LDD region is formed between the first trench and the first doped region. The second LDD region is formed between the gate and the second doped region. The first and second doped regions form a source and a drain, respectively. The first trench is deeper than the first and the second lightly-doped drain regions.