Integrated Voltage Regulator Topology for Low-Ripple Buck Conversion
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high energy efficiency with reduced power consumption and area occupancy, particularly due to inefficiencies in buck converters at varying load conditions and the use of large-capacitance passive elements.
Innovation Solution
A semiconductor device with an integrated voltage regulator (IVR) that utilizes a 3-level buck converter structure without a flying capacitor, employing switches to alternately provide input voltages and ground voltage to an inductor, maintaining low switching frequency and inductor ripple current, thus optimizing energy efficiency across light and heavy loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the inductance of the buck converter is increased to achieve low inductor ripple current, then the inductor peak-to-peak current is reduced, but the occupied area of the buck converter increases
Solution Approach 1:
The patent segments the single inductor function into two separate inductors (first inductor and second inductor) that operate in alternating phases. This segmentation allows each inductor to be smaller in size while collectively providing the required inductance, thus reducing the total occupied area while maintaining low ripple current performance.
Solution Approach 2:
The patent employs dynamic switching between two inductors using control signals that alternately activate the first and second inductors. This dynamic operation allows the system to maintain low ripple current characteristics while using smaller individual inductors, thereby reducing the overall occupied area compared to a static single large inductor design.
2Loss of energy
If the switching frequency of the buck converter is increased to achieve low inductor ripple current, then the inductor peak-to-peak current is reduced, but the energy efficiency at light load conditions decreases due to switching losses
Solution Approach 1:
The patent implements periodic action by alternating between two inductors in a phased manner, where each inductor operates for a specific duration before switching to the other. This periodic switching allows the system to maintain low ripple current without requiring excessively high switching frequencies, thereby preserving energy efficiency at light load conditions while still achieving the desired current ripple performance.
Solution Approach 2:
The system dynamically adjusts its operation by switching between two inductors based on control signals, allowing flexible adaptation to different load conditions. This dynamic approach enables the buck converter to maintain low ripple current at moderate switching frequencies, avoiding the excessive switching losses that would occur at high frequencies during light load operation.
3Use of energy by moving object
If a three level buck converter is used to reduce switching frequency, then the switching losses are reduced, but additional large-capacitance passive elements such as flying capacitor are required
Solution Approach 1:
The patent segments the filtering function from the energy storage function by using two separate inductors instead of a single inductor combined with a flying capacitor. This segmentation eliminates the need for additional large-capacitance passive elements while still achieving reduced switching frequency and associated switching losses, thereby simplifying the overall device structure.
Solution Approach 2:
The patent extracts and eliminates the flying capacitor component from the three-level buck converter topology by using an alternative two-inductor configuration. This extraction removes the complexity associated with large-capacitance passive elements while preserving the benefits of reduced switching frequency and lower switching losses.
4Productivity
If the number of processor cores and computational logic units is increased, then the computational capability is improved, but the power consumption increases
Solution Approach 1:
The patent implements dynamic voltage regulation that can adaptively adjust the output voltage and current based on the actual power requirements of the processor cores and computational logic units. This dynamic control allows the system to provide higher power when computational capability is increased, while optimizing power delivery efficiency to minimize unnecessary power consumption, thus addressing the trade-off between computational capability and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The IVR achieves high energy efficiency with a reduced footprint, maintaining efficiency in both light and heavy load conditions by minimizing switching losses and eliminating the need for additional passive elements, thereby optimizing power management in semiconductor devices.
Implementation Method 1
an inductor connecting the output node to an input node
Implementation Method 2
a capacitor including one end connected to an output node and the other end connected to a ground
Data Source
AI summary
Disclosed is a semiconductor device, which includes a semiconductor integrated circuit (IC) chip including a load circuit which receives a load current from an integrated voltage regulator (IVR), and a substrate including an electrical path for providing a signal to the semiconductor IC chip, and the IVR includes a capacitor including one end connected to an output node and the other end connected to a ground, an inductor connecting the output node to an input node, and a first switch, a second switch, and a third switch, one end of each switch respectively connected to the input node, and the first switch, the second switch, and the third switch alternately provide a first input voltage, a second input voltage, and a ground voltage to the input node, respectively.