Dc-Dc Conversion TRIZ Cases

Grouping-mode gate control lowers average switching frequency at light load while preserving zero-voltage switching under heavier loads.

Controlled dropout and bypass transitions limit inrush current while preserving overcurrent protection in a voltage regulator circuit.

A voltage-selection and power-down circuit disables regulators across asynchronous supply rails while limiting harmful voltage stress.

A transconductance amplifier, buffer, and capacitors support converter output during load steps to limit voltage droop and meet USB PD needs.

By splitting input current across two paths and an external resistor, this case limits power and heat so LED load drivers fit compact PCBs.

Feedforward gate waveform control manages double-gate IGBT timing to cut switching loss while suppressing noise and surge voltage.

Input voltage detection and mode switching enable seamless power-source transitions while reducing shutdown risk in semiconductor circuits.

A resistor-divider sensor and diode clamp limit output detection voltage, protecting the control circuit from overvoltage damage.

Voltage sensing during precharge detects input-terminal short circuits early, allowing the control circuit to stop operation before damage.

Overlapping windings on a shared center leg cut flux density and core loss, helping compact power converters handle higher current with better heat dissipation.

Combining low-pass measured current with high-pass modeled current yields a zero-latency digitized signal for switching converters.

Uses sparse current and voltage data plus physics-informed neural networks to estimate DAB converter parameters with noise robustness.

Phase-shifted transformer switching enables high-power low-voltage conversion with fewer components, lower ripple, and no capacitor voltage sensing.

Closed-loop feedback from the push-pull primary side stabilizes multi-channel output voltage without adding extra balancing circuitry.

A voltage limiting capacitor and charge-control path help a plasma DC-DC converter damp spikes and withstand repeated short-circuits.

Separate gate and active-region barrier epitaxy lets GaN HEMTs lower on-resistance while keeping threshold voltage stable and reliable.

A shared inductor handles both EMI filtering and active pre-charge in avionics LRUs, limiting inrush current and voltage spikes with less weight.

A back-to-back semiconductor circuit combines AC-DC conversion, voltage regulation, and current limiting to save space and simplify power control.

Output slope monitoring helps distinguish variable voltage behavior from real converter faults, improving detection accuracy and reducing stress.

PWM phase control uses a coupled inductor ripple current to achieve zero-voltage switching and cut switching losses in power converters.

Soft-switching control uses transformer short-circuit sequencing in a full-bridge DC-DC converter to cut losses and reduce switch stress.

Using the overcurrent detection circuit to also monitor supply-line voltage simplifies gate-drive protection and cuts redundant circuit cost.

Captures dead-time parasitic oscillation energy in a power converter to suppress noise and support zero-voltage switching with lower losses.

Shared class-D output inductors and switches generate DC supply rails, cutting power loss and extra converter components.

Using slope compensation and switch control signals, this buck-boost controller simplifies mode switching and reduces extra circuit area.

Gradually increasing pulse width and limiting switching frequency during soft-start reduces current spikes and stabilizes converter output voltage.

Scanning internal and external phase shifts cuts total losses and improves ZVS in multiple active bridge converters, especially at low power.

Switching a multiphase regulator to a lower-input-voltage efficiency mode improves light-load operation while preserving high-power capability.

Phase-shifted PWM control regulates both output voltage and flying capacitor voltage in a hybrid converter without separate control circuits.

Dynamic switch and compensation-current control cuts inductor negative current loss while sustaining power during light-to-heavy load transitions.

A virtual port mode connects link reactance directly between same-polarity ports to shorten power transfer and reduce current stress.

Phase extrapolator circuits and a selector multiplexer keep converter clocks evenly spaced, reducing ripple and improving power regulation.

Zero-voltage switching and output voltage halving help this bidirectional three-level DC-DC converter improve efficiency and reduce switching noise.

A sample-and-hold peak capture with dual ADC channels improves charger current estimation when battery charging operates in DCM.

Synchronized dual switching regulators let a PD controller balance two connector outputs while cutting EMI and BOM cost.

Converts shunt voltage into pulse sequences that track power dissipation, enabling fast thermal protection of solid-state switching circuits.

Automatic switching into an ultra-low current mode cuts buck converter input draw at light loads while maintaining sufficient output power.

Event-driven D flip-flop transitions cut clock overhead, power use, and metastability delays in switching converter control.

Sacrificial heteroepitaxy interfaces confine and remove defects before direct wafer bonding, enabling reliable high-breakdown SiC-Si power devices.

A dual active bridge UPS shares transformer, switches, and inductors to charge the DC source and cut separate charger components and losses.

A DAC-based digital control loop regulates DC-DC output voltage accurately while removing costly ADC circuitry and reducing conversion loss.

Multiple determination voltages let the control circuit distinguish faults in separate voltage generation paths while stabilizing output voltage.

A third conversion module with buck-boost elements compensates low-frequency output ripple under single-phase or unbalanced input.

Peak-current timing and timer-based duty-cycle switching smooth buck to buck-boost transitions and prevent output voltage overshoot.

Auxiliary series converters inject compensation voltage from current mismatch to equalize load sharing and avoid overload in parallel DC/DC converters.

Peak current triggered ramp control smooths buck, buck-boost, and boost transitions to minimize output voltage overshoot and undershoot.

A shared transformer and inner-loop charge control deliver two regulated voltages with fewer parts, lower heat, and lower converter complexity.

A minimum clamp on compensation voltage lets peak current mode buck converters switch to PWM faster, reducing output undershoot and overshoot.

By sweeping and optimizing internal and external phase shifts, this case cuts MAB converter losses and preserves ZVS efficiency at low power.

Phase-shifted primary control preserves zero-voltage switching in a shared-secondary three-phase AC-DC converter while reducing rectifier stages and parts.

Maintaining a fixed voltage ratio between high- and low-voltage batteries helps the converter sustain ZVS/ZCS, cut peak currents, and reduce losses.

Adaptive power-stage control keeps only safe partial phases active at low voltages, cutting leakage while preserving fast SoC mode transitions.

Synchronized triangular-signal control replaces digital timing limits to keep resonant converter switching precise and ZVS-ready at high frequency.

A switch control circuit shifts a linear regulator from higher to lower input voltage to cut power loss while maintaining stable output.

Coordinated refresh timing lets a DC-DC converter avoid sensor measurement windows, reducing transient corruption in battery-powered devices.

A single conversion circuit uses dynamic switching, inductors, and filtering to handle AC/DC bidirectional conversion with lower cost and power use.

Multi-phase startup and bulk-node switching limit in-rush current, clamp output overshoot, and support ultra-low-leakage shutdown.

Adaptive ramp compensation tracks inductor current slope to keep voltage converters stable and responsive under voltage and inductor variation.

Parallel regulator paths use global and local error correction to offset pathway mismatch and keep output voltage substantially constant.

A pre-charged capacitor boosts the output transistor gate, speeding current ramp-up while preserving soft-start current limiting.

Delayed negative current enablement cuts ripple and DC offset in switching regulators handling bi-polar load currents.

A 3-level IVR without a flying capacitor cuts switching losses and footprint while maintaining low ripple across light and heavy loads.

PWM blanking windows and adjustable peak and valley thresholds improve buck converter average current regulation for LED loads.

Variable ramp-based compensation currents adapt to buck, boost, and buck-boost operation to suppress sub-harmonic oscillations and improve efficiency.

Shunt filters route common-mode current through less-resistive paths to cut DC/DC converter EMI without heavy inductors or split DC links.

A single current-sensing circuit enables droop current sharing in bidirectional converters while cutting sensing parts, loss, and PCB footprint.

A single controller programs multiple DC-DC converters to deliver accurate, adjustable DC rails for changing electronic load demands.

Cuts feedback during load disconnection so the converter enters sleep mode and sharply lowers no-load power loss.

A shared calibrated ramp keeps multi-phase PWM timing aligned, improving phase margin consistency, power balance, and output regulation.

Active bridge control synthesizes AC-link impedance to replace bulky inductors or transformers, cutting converter weight while improving regulation.

Vertical stacked transformer layers cut PCB resistance and inductance, improving transient power delivery and circuit density for processors.

A secondary controller calculates switch hold time from local voltage or charge-discharge timing to achieve primary ZVS without added communication.

Adaptive phase delays tied to a primary stage switching period preserve interleaving, cut capacitor count, and sustain converter efficiency.

A power MUX switches stacked secondary winding paths to deliver USB-C power efficiently across SPR and EPR ranges.

A switchable resistor network changes the over-power threshold with output voltage, preventing standby overheating and protection failure.

A pre-asserted flag lets the regulator raise system voltage before heavy load demand, stabilizing LDO output and PSRR during switching.

Variable burst regulation and a current-driven clock spread converter frequency to meet EMI limits while maintaining stable DC/DC operation.

A direct charging path supplements switched current to follow abrupt digital core load changes, stabilizing output voltage and limiting overshoot.

A mirrored capacitor current path enables accurate flyback primary-current sensing while cutting resistor loss, cost, and circuit area.