Primary-Side Converter Control for Light-Load Switching Loss
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Solution Overview
Problem
Power converters face inefficiencies in switching loss and core loss due to high gate control signal frequencies when operating in critical conduction mode with light loads, while transitioning to discontinuous conduction mode results in loss of zero-voltage switching.
Innovation Solution
A primary-side controller that adjusts the frequency of gate control signals using a grouping mode, alternating between discontinuous and critical conduction modes based on load conditions, employing counters, an adjuster, and a logic circuit to optimize switching frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the frequency of the gate control signal is maintained high for high-frequency applications, then the power converter can respond quickly to load changes, but switching loss increases causing the main switch to heat up when the load is light
Solution Approach 1:
The patent implements dynamic frequency adjustment by switching between DCM (low frequency at light load) and CRM (higher frequency at heavy load). This dynamic adaptation allows the system to maintain fast response capability when needed while reducing switching losses and heat generation during light-load operation.
Solution Approach 2:
The controller changes the operating mode parameter to adjust switching frequency according to load conditions. This parameter change enables the system to optimize the trade-off between response speed and switching loss by selecting appropriate conduction modes for different operating scenarios.
Data Source
AI summary
A primary-side controller applied to a power converter is used for controlling a frequency of a gate control signal according to a grouping mode. The primary-side controller includes a first counter, a second counter, an adjuster, a gate control signal generation circuit, and a logic circuit. The first counter generates a first signal according to the gate control signal and a predetermined number. The second counter generates a second signal according to a clock signal and the predetermined number. The adjuster determines whether to adjust the predetermined number according to the second signal, the predetermined number, and a frequency of the clock signal. The logic circuit generates a reset signal to the first counter and the second counter and an enable signal to the gate control signal generation circuit according to the first signal, the second signal, and the gate control signal.