Intelligent Memory Architecture with Coding Banks
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Solution Overview
Problem
As processor speed and number of processors increase, memory access speed does not proportionally improve, leading to degraded memory access times due to increased conflicts when multiple processors attempt to access the same memory bank simultaneously.
Innovation Solution
The implementation of additional redundant memory banks, referred to as coding banks, which store data in a coded format to reduce access conflicts and enhance memory access efficiency by using interbank and intrabank coding schemes, allowing concurrent access and minimizing storage space and access overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the number of processors is increased, then processing power is improved, but memory access time is degraded due to increased access conflicts
Solution Approach 1:
The memory system is segmented into multiple independent memory banks (first memory bank, second memory bank, etc.), each capable of handling requests independently. This segmentation allows different processors to access different banks simultaneously, reducing access conflicts and improving memory access time while maintaining high processing power.
Solution Approach 2:
A memory controller is introduced as an intermediary between processors and memory banks. The controller manages and coordinates access requests, implementing intelligent scheduling and arbitration to optimize memory access patterns, thereby reducing access time degradation caused by multiple processors competing for memory resources.
2Productivity
If multiple processors access the same memory bank simultaneously, then parallelism is improved, but access conflicts increase leading to processor stalls
Solution Approach 1:
Memory is divided into multiple independent banks that can be accessed in parallel without interfering with each other. This allows multiple processors to access different memory banks simultaneously, maintaining high parallelism while eliminating access conflicts and processor stalls.
Solution Approach 2:
The system transitions from a single-dimension memory access model to a multi-dimensional model where access occurs across multiple banks simultaneously. By adding the bank dimension, the system achieves true parallel access, improving productivity while reducing stalls caused by sequential access limitations.
3Productivity
If redundant memory banks are added, then memory access efficiency is improved, but storage space requirements increase
Solution Approach 1:
Each memory bank serves multiple purposes: storing data for different processors, enabling parallel access, and providing backup capacity. This multi-functionality allows the system to achieve high memory access efficiency with moderate additional storage space, as the same memory resources serve multiple roles simultaneously.
Solution Approach 2:
The system changes the organizational parameters of memory from a single large bank to multiple smaller banks. This parameter change (number of banks, bank size distribution) optimizes access efficiency by enabling parallel operations while controlling total storage space requirements through efficient bank utilization.
Data Source
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AI summary
A method includes receiving a first request, from a first master core, to access data in one of a plurality of memory banks. It is determined whether an access to the data is stalled by virtue of a second request, from a second master core, to access the data in the one of the plurality of memory banks, the second request currently being serviced. In response to a determination that the access to the requested data is stalled, the first request is serviced by accessing data in one of a plurality of coding banks, each coding bank smaller in size than each memory bank.