Interconnect Bridge Chip Structure for Compact Multi-Die Packaging
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to integrate multiple electronic components efficiently while reducing feature sizes, particularly in forming compact and interconnected chip structures that facilitate electrical connections between dies.
Innovation Solution
A method involving the use of a bridge die with an interconnect bridge and dielectric layer to establish lateral electric transmission paths between semiconductor dies, combined with a redistribution circuitry structure for external connections, allowing for compact packaging of multiple dies in a single chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor dies are packaged in a compact form using a bridge structure, then integration density is improved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the packaging structure into separate functional modules: a bridge structure with interconnect bridges for electrical connection, a dielectric layer for insulation, and individual semiconductor dies. This segmentation allows each component to be manufactured and prepared independently before assembly, reducing overall manufacturing complexity while achieving high integration density through compact arrangement of these modular units.
Solution Approach 2:
The patent transitions from traditional planar packaging to a three-dimensional structure by stacking semiconductor dies vertically on the bridge structure. The dielectric layer and interconnect bridges create multiple vertical levels, enabling compact packaging of multiple dies in a limited footprint area, thereby improving integration density without proportionally increasing manufacturing complexity.
2Reliability
If semiconductor dies are connected through a bridge structure with interconnect bridges, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The patent introduces a bridge structure as an intermediary component between multiple semiconductor dies. This bridge structure contains interconnect bridges that facilitate electrical connection between dies without requiring direct die-to-die contact. The dielectric layer acts as an intermediary for electrical insulation. These intermediary elements improve electrical connectivity reliability while keeping the overall device design modular and manageable, preventing excessive complexity.
3Volume of moving object
If the bridge structure is made thinner to reduce volume, then packaging compactness is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent optimizes the thickness parameter of the bridge structure and dielectric layer to achieve a balance between compactness and manufacturability. By carefully selecting and controlling the thickness parameters within specific ranges, the design achieves reduced packaging volume while maintaining manufacturing feasibility. The standardized thickness parameters allow for precise control during fabrication processes without requiring extreme precision that would be difficult to achieve.
Data Source
AI summary
A chip structure provided herein includes a bridge structure including an interconnect bridge, a dielectric layer laterally surrounding the interconnect bridge and through dielectric vias extending from a top of the dielectric layer to a bottom of the dielectric layer, wherein a thickness of the interconnect bridge is identical to a height of each of the through dielectric vias; semiconductor dies disposed on the bridge structure, wherein each of the semiconductor dies overlaps both the interconnect bridge and the dielectric layer and is electrically connected to the interconnect bridge and at least one of the through dielectric vias; and a die support, the semiconductor dies being disposed between the die support and the bridge structure, wherein a sidewall of the die support is coplanar with a sidewall of the bridge structure.