Dual-Density Insulation Capping for Dense Metal Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As integrated circuit devices scale down, the reduced spacing between wiring lines leads to increased resistance due to insufficient contact area, making it challenging to maintain low resistance in densely packed areas.
Innovation Solution
The implementation of a dual-density insulation capping structure, where a first insulation capping pattern with a lower density is directly on the metal layer, and a second insulation capping pattern with a higher density is spaced apart, helps in reducing resistance by optimizing the contact area and preventing the formation of undesired insulating metal nitride layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If integrated circuit devices are scaled down to reduce size, then the area occupied by wiring lines is reduced, but the contact area among wiring lines and conductive structures becomes insufficient leading to increased resistance
Solution Approach 1:
The patent introduces a vertical dimension by forming insulation capping structures with different densities at different heights above the metal layer. The first insulation capping pattern is formed directly on the metal layer, while the second insulation capping pattern is formed at a higher position, creating a multi-level vertical structure that prevents harmful factors without occupying additional horizontal area.
Solution Approach 2:
The patent applies different densities of insulation capping patterns at different locations above the metal layer. The first insulation capping pattern has a first density and is positioned directly on the metal layer, while the second insulation capping pattern has a second density (different from the first) and is positioned at a higher position. This local differentiation allows optimized prevention of metal nitride formation at each location.
2Productivity
If wiring lines are densely arranged within a limited area, then the device size is reduced, but the resistance of wiring lines increases due to insufficient contact area
Solution Approach 1:
The patent moves the solution from horizontal plane to vertical space by forming multi-level insulation capping structures. Instead of increasing horizontal spacing between densely packed wiring lines, the invention uses vertical stacking of insulation capping patterns with different densities to prevent resistance increase, allowing maintenance of high integration density.
3Reliability
If insulation capping structures are formed to prevent metal nitride formation, then reliability is improved, but the structural complexity increases
Solution Approach 1:
The patent divides the insulation capping structure into multiple segmented patterns with different densities positioned at different heights. The first insulation capping pattern and second insulation capping pattern are formed as separate entities with distinct densities, allowing each segment to perform its function independently while collectively preventing metal nitride formation more effectively than a uniform structure.
Data Source
AI summary
An integrated circuit device includes a conductive line including a metal layer and an insulation capping structure covering the conductive line. The first insulation capping structure includes a first insulation capping pattern that is adjacent to the metal layer in the insulation capping structure and has a first density, and a second insulation capping pattern spaced apart from the metal layer with the first insulation capping pattern therebetween and having a second density that is greater than the first density. In order to manufacture the integrated circuit device, the conductive line having a metal layer is formed on a substrate, a first insulation capping layer having the first density is formed directly on the metal layer, and a second insulation capping layer having the second density that is greater than the first density is formed on the first insulation capping layer.