Interconnect Selection Circuitry for Low-Crosstalk FPGA Routing
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Solution Overview
Problem
Conventional programmable integrated circuits face inefficiencies due to the direct correspondence between multiplexing circuits, drivers, and interconnects, leading to resource wastage and increased area occupation, particularly in routing paths for different types of interconnects with varying physical characteristics.
Innovation Solution
The implementation of output selection and driver circuitry with multiple selection stages, including multiplexers and tristate drivers, allows for efficient routing of signals to various interconnects, reducing crosstalk and optimizing resource usage by enabling selective routing and electrical disconnection of interconnects, while also accommodating different physical characteristics of interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a direct correspondence between multiplexing circuits, drivers, and interconnects is maintained, then each interconnect type can be independently controlled, but the number of routing paths increases and area occupation increases
Solution Approach 1:
Multiple interconnect types (horizontal and vertical) share common multiplexing circuits and drivers through a pool of available interconnects. The second selection stage allows dynamic assignment of drivers to different interconnect types, merging resources that were previously dedicated to specific interconnect types.
Solution Approach 2:
The multiplexing circuits and drivers are designed to be universal, capable of driving multiple types of interconnects (horizontal, vertical, different lengths). A single driver can serve multiple interconnect types by being dynamically assigned through the selection stages, making the circuitry multi-functional rather than dedicated to a single interconnect type.
2Adaptability or versatility
If separate multiplexing circuits and drivers are provided for each interconnect type, then signal routing flexibility is improved, but resource usage efficiency deteriorates
Solution Approach 1:
The system transitions from static, dedicated assignments of drivers to specific interconnect types to dynamic assignments. The second selection stage enables runtime reconfiguration where drivers can be assigned to different interconnect types based on current routing requirements, optimizing resource utilization while maintaining flexibility.
Solution Approach 2:
The selection process is divided into two independent stages: first selection stage for output signal selection and second selection stage for interconnect type selection. This segmentation allows independent optimization of each stage and enables the pooling of drivers across multiple interconnect types without compromising routing flexibility.
3Adaptability or versatility
If routing paths are provided to multiple multiplexing circuits for different interconnect types, then interconnect selection capability is improved, but area occupation increases
Solution Approach 1:
Multiple interconnect types share common routing paths from the logic circuits to the multiplexing circuits. Instead of providing separate dedicated paths for each interconnect type, the system merges the routing paths and uses the second selection stage to dynamically direct signals to the appropriate interconnect type, reducing redundant routing infrastructure.
4Adaptability or versatility
If more multiplexing circuits and drivers are added to support various interconnect types, then routing options increase, but device complexity increases
Solution Approach 1:
The control architecture is segmented into two independent selection stages, each with its own control signals from memory elements. This segmentation allows the system to manage complexity by breaking down the control logic into manageable, independent modules rather than requiring a single complex control mechanism.
Solution Approach 2:
The system changes the control parameter from dedicated static assignments to dynamic configurable assignments. By using memory elements to store control signals that can be programmed, the system achieves high routing options without increasing hardware complexity, as the flexibility is achieved through programmable control rather than additional circuitry.
Data Source
AI summary
Integrated circuits such as programmable integrated circuits may include programmable logic regions that can be configured to perform custom user functions. The programmable logic regions may produce output signals. The integrated circuit may include interconnects that route selected output signals throughout the integrated circuit. The integrated circuit may include output selection circuitry having output selection and interconnect selection stages. The output selection circuitry may be configured to select which of the output signals produced by the programmable logic regions are provided to the interconnects for routing. The interconnect selection stage may be formed using multiplexing circuits or tristate drivers. Logic design system computing equipment may be used to generate configuration data that can be used to program the output selection circuitry to reduce crosstalk by routing signals away from critical interconnects or by double-driving critical interconnects.