Interconnect Structure With Sidewall Barrier for Low-Resistance Filling
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down devices due to increased device resistance and corrosion issues, particularly with the use of new materials and geometries in interconnect structures, which affect the efficiency and reliability of integrated circuits.
Innovation Solution
The implementation of interconnect structures with a barrier layer that does not cover the bottom surfaces of conductive features, combined with a treatment process to passivate the exposed surfaces, and the use of multiple liner layers that are intermixed on sidewalls to improve adhesion of the conductive fill material, reducing device resistance and corrosion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a barrier layer is formed to cover the bottom surface of conductive features, then corrosion is reduced, but device resistance increases
Solution Approach 1:
The barrier layer is selectively positioned only on the sidewalls of the conductive features rather than covering the entire bottom surface. This local application provides corrosion protection where needed (at the sidewalls) while leaving the bottom surface exposed for direct conductive contact, thereby maintaining low device resistance. The selective positioning resolves the contradiction between corrosion resistance and electrical conductivity.
2Productivity
If new materials and geometries are used for scaling down, then device density increases, but manufacturing complexity increases
Solution Approach 1:
The interconnect structure is divided into multiple functional layers: a first liner layer (e.g., cobalt) on the sidewalls, a second liner layer (e.g., ruthenium) on the bottom surface, and a conductive fill material. This segmentation allows each layer to perform its specific function optimally - the first liner provides adhesion and corrosion resistance on sidewalls, while the second liner provides a diffusion barrier on the bottom surface. The segmented approach simplifies manufacturing by enabling selective deposition and etching processes.
Solution Approach 2:
The interconnect structure uses composite material composition with multiple liner layers made of different materials (e.g., cobalt and ruthenium) with distinct properties. The first liner layer material is selected for adhesion and sidewall protection, while the second liner layer material is selected for bottom surface diffusion barrier properties. This composite structure enables scaling to higher densities while managing the complexity through material property optimization.
3Strength
If liner layers are formed with complete coverage, then adhesion is improved, but corrosion resistance decreases
Solution Approach 1:
Different liner layers are applied to different locations: the first liner layer (e.g., cobalt) is deposited on the sidewalls where adhesion is critical, while the second liner layer (e.g., ruthenium) is deposited on the bottom surface where corrosion resistance is critical. This local quality differentiation allows each liner to be optimized for its specific location's requirements, achieving both strong adhesion and corrosion resistance simultaneously.
Solution Approach 2:
The dual liner structure uses composite materials with complementary properties - the first liner provides adhesion strength on sidewalls, while the second liner provides corrosion resistance on the bottom surface. This composite approach resolves the contradiction by assigning different material functions to different spatial locations within the same interconnect structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively decreases device resistance and reduces corrosion, enhancing the efficiency and reliability of interconnect structures in semiconductor devices by improving the adhesion and filling processes within the interconnect levels.
Implementation Method 1
a treatment process to passivate the exposed surfaces
Data Source
AI summary
A method of manufacturing an interconnect structure includes forming an opening through a dielectric layer. The opening exposes a top surface of a first conductive feature. The method further includes forming a barrier layer on sidewalls of the opening, passivating the exposed top surface of the first conductive feature with a treatment process, forming a liner layer over the barrier layer, and filling the opening with a conductive material. The liner layer may include ruthenium.